Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
Grenoble, France – July 28, 2014 -- Dolphin Integration are proud to announce the availability of the ultra high density standard cell library at 90 nm LP eFlash and uLL which comes to complete the panoply offering in this node.
Thanks to its Reduced Cell Stem Library (RCSL) architecture, SESAME uHD-BTF allows logic designers to:
- reduce the die cost
- 6 track library versus 7 track library at 90 nm
- Up to 15% smaller after P&R thanks to “spinner cells” (pulsed latches) compensating any congestion risk
- Extend battery life
- 30% less consuming thanks to the homogeneous optimization allowed by the reduced number of cells
For more information about the:
- SESAME uHD-BTF TSMC 90 nm LP eFlash click here
- SESAME uHD-BTF TSMC 90 nm uLL click here
Or contact Dolphin Integration Library Marketing Manager at libraries@dolphin-ip.com
About Dolphin Integration
Dolphin Integration contribute to "enabling mixed signal Systems-on-Chip". Their focus is to supply worldwide customers with fault-free, high-yield and reliable kits of CMOS Virtual Components of Silicon IP, based on innovative libraries of standard cells, flexible registers and low-power memories. They provide high-resolution converters for audio and measurement, regulators for efficient power supply networks, application optimized micro-controllers.
They put emphasis on resilience to noise and drastic reductions of power-consumption at system level, thanks to their own EDA solutions missing on the market for Application Hardware Modeling as well as early Power and Noise assessment In addition strong experiences in ASIC/SoC design and fabrication, plus privileged foundry portal even for small or medium volumes, makes them a genuine one-stop shop covering all customers’ needs for specific requests.
Related Semiconductor IP
- Standard Cell Library
- Standard Cell Library, Low Voltaage TSMC N3P
- SMIC 0.13um 6 track High Density Standard Cell Library - HVT,1.2v operating voltage
- 6 track High Density standard cell library at TSMC 180nm
- Ultra High Density 6-track Standard Cell library - TSMC 65nm 65LP LP / GP / ULP, supports 60/65/70nm channel length
Related News
- SilTerra Leverages Silvaco's Library Characterization and Optimization Tools to Boost Efficiency in the Development of its Foundry Standard Cell IPs
- Dolphin Integration measures 15% area reduction on 65 nm logic circuit with its 6-Track standard cell library
- Dolphin Integration first to achieve 0.84 pA per bit in SpRAM at the 90 nm uLL embedded flash process
- NASA Selects Ridgetop Group to Develop an Innovative Modular SiGe 130 nm Cell Library
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations