Altera teams with Synplicity to synthesize of SoC cores in programmable logic
Altera teams with Synplicity to synthesize of SoC cores in programmable logic
By Semiconductor Business News
April 3, 2001 (2:07 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010403S0009
SAN JOSE -- Altera Corp. today (April 3) announced a partnership with Synplicity Inc. in nearby Sunnyvale to increase the ability to synthesize intellectual property (IP) functions in programmable logic for system-on-chip applications. Under a licensing agreement, Synplicity has agreed to provide Altera with its Synplify Pro and Amplify software, which can be used to develop MegaCore functions in "system-on-a-programmable chips," dubbed SoPC. In addition, Synplicity has agreed to provide a special version of its synthesis software to Altera customers for use with encrypted MegaCore functions. "As more customers adopt our SoPC solutions, the development methodology is critical in the successful implementation and integration of IP," said Craig Lytle, vice president of Altera's intellectual property business unit. "Leveraging Synplicity's synthesis technology for the development of our MegaCore functions will enable Altera to continue to deliver t he highest performance cores to our customers." Under the partnership agreement, Altera will distribute evaluation copies of selected Synplicity synthesis products with Quartus II development software, which provides a complete environment for SoPC design. The special version of Synplicity software supporting Altera's encrypted MegaCore functions will be available in the third quarter of 2001. Evaluation copies of Synplicity products bundled with Quartus II software will also be available in the third quarter.
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- CAN-FD Controller
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
Related News
- Menta Delivers Industry's Highest Performing Embedded Programmable Logic IP for SoCs
- Gowin Semiconductor Unveils the Latest Embedded Memory Products for their Families of Programmable Logic Devices
- Intel Adds to Portfolio of FPGA Programmable Acceleration Cards to Speed Up Data Center Computing
- Gowin Semiconductor Brings Ultra Low Power Programmable Logic Devices To Market
Latest News
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP
- Perceptia Begins Port of pPLL03 to Samsung 14nm Process Technology
- Spectral Design and Test Inc. and BAE Systems Announce Collaboration in RHBD Memory IP Development