Need really big FPGAs? Xilinx will be taking the "3D" route for initial Virtex 7 parts
Ivo Bolsens, the Xilinx CTO and Senior VP, presented a keynote at the 8th International SoC Conference a couple of weeks ago and one of the aspects of FPGA development that he discussed was Xilinx’ plan for creating large-capacity Virtex 7 FPGAs using 28nm process technology. Every leading-edge process technology experiences a learning curve and initially, it’s hard to make the largest possible chips in any new process technology with commercially viable yields. So Xilinx faced a problem: it would not be able to make the largest possible Virtex 7 FPGAs for a while using 28nm technology. What to do for those leading-edge customers who always want to use the largest, fastest parts as soon as possible?
To read the full article, click here
Related Semiconductor IP
- JESD204E Controller IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
Related Blogs
- Is the Buzz around Xilinx's 2.5D FPGA Justified?
- PLD Overview: Xilinx and Altera
- Xilinx ARMs FPGAs, Altera to MIPSify Them
- Intel Eyeing Xilinx?
Latest Blogs
- A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library
- FPGAs vs. eFPGAs: Understanding the Key Differences
- UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
- RT-Europa: The Foundation for RISC-V Automotive Real-Time Computing
- Arm Flexible Access broadens its scope to help more companies build silicon faster