Technical Comparison: MIPI MPHY 3.1 vs MPHY 3.0
Recently MIPI Alliance has announced the M-PHY version 3.1 specification. We are very excited about the new version and have already launched world's first MIPI MPHY 3.1 Verification Solution. M-PHY 3.1 introduces some new configuration attributes, some timing calculation modification and some other changes that we will describe below. The new specification does not introduce any new transfer speed/gear configurations.
In terms of benefits, when compared to MPHY 3.0, there is an improvement in power optimization, false line state detection (LINE_RESET) and general cleanup of timer timeouts etc. In this blog, we are going to summarize the main technical differences between M-PHY 3.1 and M-PHY 3.0 specifications. Hopefully, these will help you hit the ground running!
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
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