RISC-V Gathering Momentum
September 5, 2016
I've been writing quite a bit about RISC-V (pronounced "risk five") since I think that it is going to turn out to be very significant, although it is still early days. However, momentum is truly building behind the instruction set architecture (ISA). A week or so ago I talked to Krste Asanović, who is the UC Berkeley professor who led the project to define RISC-V, chairman of the RISC-V foundation, and in July co-founded a fabless semiconductor company, SiFive, to produce silicon implementations (and IP). I'll talk about SiFive in Breakfast Bytes one day next week.
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