Are low power and FPGA an oxymoron?
There is a lot of talk about low power these days, and not surprising given the way that handheld devices are become the must have things to be seen with, play with, and to keep our productivity high.
Power has become one of the principle attributes that designs are optimized for. We see power optimization techniques popping up at all abstraction levels of the design, from a new fabrication technology that reduces transistor leakage, through clock gating, power gating, variable voltage and frequency and everything in between.
The other day I wrote a blog that talked about the differences between accuracy and fidelity when it comes to power estimation. Accuracy can only come with detail, but detail often prevents our ability to access the information from which we can make other important decisions. When we cannot have accuracy, we need fidelity.
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Related Semiconductor IP
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- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related Blogs
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- NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers