NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers
At the end of last year, I moderated a Sonics webinar to introduce the concept of a network-on-chip or NoC. It was called NoC 101 and the replay is still available here.
Well it is a new year and time for chapter 2. I will be moderating a webinar next Wednesday February 4th at 10am pacific time. Once again the webinar itself will be delivered by Drew Wingard who is the CTO of Sonics. It is entitled NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers.
The performance and power requirements are very different for IoT devices such as wearables, and big server SoC. But it turns out that the same underlying technology, the NoC, can be used in both cases to integrate the large numbers of IP blocks that might be involved, handle the power domains and often the powering up and down of individual blocks of IP.
To read the full article, click here
Related Semiconductor IP
- xSPI Multiple Bus Memory Controller
- MIPI CSI-2 IP
- PCIe Gen 7 Verification IP
- WIFI 2.4G/5G Low Power Wakeup Radio IP
- Radar IP
Related Blogs
- Self-contained low power Wi-Fi IP for IoT apps
- LPDDR5: Meeting Power, Performance, Bandwidth, and Reliability Requirements of AI, IoT and Automotive
- Are low power and FPGA an oxymoron?
- 28nm-SLP technology - The Superior Low Power, GHz Class Mobile Solution
Latest Blogs
- The Growing Importance of PVT Monitoring for Silicon Lifecycle Management
- Unlock early software development for custom RISC-V designs with faster simulation
- HBM4 Boosts Memory Performance for AI Training
- Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows
- Locking When Emulating Xtensa LX Multi-Core on a Xilinx FPGA