IEEE 802.3 -- Standardizing the Next Generation of Ethernet PHYs
I attended the IEEE 802.3 standards meeting in York, England recently. Over 200 people came from all over the world to work on standards for the next generation of Ethernet products.
Work is ongoing to standardize new Ethernet PHYs (physical layer devices) for speeds of 1Gbps, 40Gbps, 100Gbps and 400Gbps. The 1Gbps work is focused on the automotive and industrial market segments, a field that Cadence is particularly committed to supporting with its Ethernet IP.
Ethernet is expected to be widely adopted in cars -- it meets all the speed, cost, reliability and inter-operability requirements. The IEEE working group is working to standardize a gigabit PHY optimized for automotive environments that will operate over a single twisted pair of copper. This is a speed upgrade to the existing 100M automotive PHY available from Broadcom. There is also consideration being given to start a project to standardize a method of pre-emption to allow time critical traffic to be sent for closed loop control. Pre-emption is something that manufacturers of industrial control systems are asking for, and is also of interest to the automotive market.
To read the full article, click here
Related Semiconductor IP
- IEEE 802.3 Clause 74 FEC
- 50G IEEE 802.3 Reed-Solomon Forward Error Correction
- 100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
- IEEE 802.3bj Reed-Solomon Encoder and Decoder
- IEEE 802.3cg® 10BASE-T1S Digital Controller
Related Blogs
- 400G Task Force, 100G Backplane Project and Other Highlights from IEEE 802.3 Ethernet Standards Meeting
- Highlights from Recent IEEE 802.3 Ethernet Standards Meeting
- Enabling the Global 800G Ecosystem with 112G Ethernet PHY IP
- Run Faster, Welcome 800G and Terabit Speeds with Ethernet 802.3ck
Latest Blogs
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
- Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power