IEDM: TSMC N3 Details
January 25, 2023
As you know from previous blog posts, I attended IEDM in San Francisco in December. There were two presentations about TSMC's N3 process. This is actually a bit of a misnomer since TSMC has two N3 processes, one simply called N3. The other (the second generation) is called N3E.
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Related Semiconductor IP
- CAT Trip Sensor, TSMC N3
- Thermal Diode with Base Pin, TSMC N3
- Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N3
- Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N3
- In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N3
Related Blogs
- IEDM: TSMC on 3nm Device Options
- TSMC N3 will be a Record Setting Node!
- Synopsys Accelerates Multi-Die System Designs With Successful UCIe PHY IP Tape-Out on TSMC N3E Process
- Synopsys Tapes Out SLM PVT Monitor IP on TSMC N5 and N3E Processes
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