Using a PCIe over Cabling-based platform to create hybrid FPGA/virtual platform prototypes
Troy Scott, Synopsys
Embedded.com (May 21, 2013)
FPGA-based prototypes deliver high value to a SoC development organization by providing multi-megahertz processing performance, real world I/O connectivity, and portability for distribution to software developers or field testing scenarios. The prototypes deliver operational systems running fast enough to make embedded software development and hardware/software validation feasible. Teams that have adopted FPGA-based prototyping realize months in shortened schedules and a more efficient and parallel hardware/software engineering methodology.
To fully realize the potential of these systems and maximize the return on investment from prototyping systems, development teams are taking advantage of advanced data exchange links beyond traditional JTAG. High-bandwidth physical links like PCI Express (PCIe) over Cabling allow the prototype to communicate with custom user applications for system control and monitoring. With a transaction-level interface to a SystemC/TLM virtual prototype, a new class of hybrid prototype is possible that leverages the strengths of both hardware and software-based prototyping methods.
To read the full article, click here
Related Semiconductor IP
- PCI Express PHY
- Multi-Channel Flex DMA IP Core for PCI Express
- PCIe - PCI Express Controller
- PCI Express PIPE PHY Transceiver
- Scalable Switch Intel® FPGA IP for PCI Express
Related White Papers
- Enabling Composable Platforms with On-Chip PCIe Switching, PCIe-over-Cable
- Pondering the SoC platform
- Panel finds many ways to build a platform
- MEMS market to grow 75-87% over five-year period, says report
Latest White Papers
- Enabling Space-Grade AI/ML with RISC-V: A Fully European Stack for Autonomous Missions
- CANDoSA: A Hardware Performance Counter-Based Intrusion Detection System for DoS Attacks on Automotive CAN bus
- How Next-Gen Chips Are Unlocking RISC-V’s Customization Advantage
- Efficient Hardware-Assisted Heap Memory Safety for Embedded RISC-V Systems
- Automatically Retargeting Hardware and Code Generation for RISC-V Custom Instructions