Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications
By Vijay Pratap Sharma, Annu Kumar, Mohd Faisal Khan, Mukul Lokhande and Santosh Kumar Vishvakarma
NSDCS Research Group, Indian Institute of Technology Indore, India
Abstract
This work presents Bio-RV, a compact and resource-efficient RISC-V processor intended for biomedical control applications, such as accelerator-based biomedical SoCs and implantable pacemaker systems. The proposed Bio-RV is a multi-cycle RV32I core that provides explicit execution control and external instruction loading with capabilities that enable controlled firmware deployment, ASIC bring-up, and post-silicon testing. In addition to coordinating accelerator configuration and data transmission in heterogeneous systems, Bio-RV is designed to function as a lightweight host controller, handling interfaces with pacing, sensing, electrogram (EGM), telemetry, and battery management modules. With 708 LUTs and 235 flip-flops on FPGA prototypes, Bio-RV, implemented in a 180 nm CMOS technology, operate at 50 MHz and feature a compact hardware footprint. According to post-layout results, the proposed architectural decisions align with minimal energy use. Ultimately, Bio-RV prioritises deterministic execution, minimal hardware complexity, and integration flexibility over peak computing speed to meet the demands of ultra-low-power, safety-critical biomedical systems.
To read the full article, click here
Related Semiconductor IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- Compact Embedded RISC-V Processor
- Multi-core capable 64-bit RISC-V CPU with vector extensions
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
Related Articles
- Why RISC-V is a viable option for safety-critical applications
- CAST Provides a Functional Safety RISC-V Processor IP for Microchip FPGAs
- e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
- Boosting RISC-V SoC performance for AI and ML applications
Latest Articles
- Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
- Bio-RV: Low-Power Resource-Efficient RISC-V Processor for Biomedical Applications
- PermuteV: A Performant Side-channel-Resistant RISC-V Core Securing Edge AI Inference
- Making Strong Error-Correcting Codes Work Effectively for HBM in AI Inference
- Sensitivity-Aware Mixed-Precision Quantization for ReRAM-based Computing-in-Memory