RISC-V Processor IP

Welcome to the ultimate RISC-V Processor IP hub! Explore our vast directory of RISC-V Processor IP.

RISC-V is an open-source instruction set architecture used to develop custom processors for a variety of applications, from embedded designs to supercomputers.

Unlike proprietary processor architectures, RISC-V is an open-source instruction set architecture (ISA) used for the development of custom processors targeting a variety of end applications.

All offers in RISC-V Processor IP

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Compare 141 RISC-V Processor IP from 33 vendors (1 - 10)

8-stage dual issue, in-order, superscalar processor with dual vector processing units (1024-bit VLEN/512-bit DLEN)
- New RVA23 support
- New RVV1.0 512-bit vector engine
- New SSCI interface added alongside VCIX
- New instructions and extensions
- New improved memory subsystem
32-Bit & 64-Bit High Performance Processor - 9-Stage Pipeline, Dual-issue
- 900 Series processors include four different classes: N900 (32 bit), U900 (32 bit + MMU), NX900 (64 bit) and UX900 (64 bit + MMU). With MMU, UX900 supports heavyload operating systems such as Linux. 900 Series can be applied to edge computing, data center, networking, etc.
32-Bit & 64-Bit High Performance Processor - 6-Stage Pipeline, Single-issue
- 600 Series processors include four different classes: N600 (32 bit), U600 (32 bit + MMU), NX600 (64 bit) and UX600 (64 bit + MMU).
- With MMU, UX600 supports heavyload operating systems such as Linux. 600 Series can be applied to edge computing, data center, networking, etc.
64-bit High Performance Out-of-Order Processor - Out-of-Order, 3/4/6-Wide Decode
- The UX1000 Series have three different variants: UX1030, UX1040 and UX1060.
- UX1030 is a 3-wide processor with good performance and smaller power & area; UX1040 is a 4-wide processor with better performance and balanced power & area; UX1060 is a 6-wide processor with even higher performance targeting high-end applications.
64-bit application processor for energy-efficient computation
- Dubhe-80 processor features a 9+ stage, 3-issue, out-of-order pipeline, fully compliant with a rich set of RISC-V extensions of RV64GCBH_Zicond_Zicbom_Zicboz_Zicbop.
- With a score of 8.5 SPECInt2006/GHz, Dubhe-80 is designed for mobile, desktop, AI, and automotive applications that require highly energy-efficient computation.
CPU IP Following the RVA23 Profile, supporting RVV1.0 and all extensions of Vector Crypto
- Dubhe-83 CPU IP features a 10+ stage pipeline, 3-issue, and out-of-order pipeline, follows the RVA23 Profile, supports RV64GCBVH, supports RVV1.0 and supports all extensions of Vector Crypto.
- With a score of 8.5 SPECInt2006/GHz, Dubhe-83 targets applications that require highly energy-efficient computation, including mobile, desktop, AI, and automotive.
High Performance 64-bit RISC-V Processor
- Dubhe-90 is a high-performance commercial RISC-V CPU Core IP that is deliverable.
- It adopts an 11+ stage and 5-issue pipeline, superscalar, and deep out-of-order execution, and supports standard RISC-V RV64GCBH extensions.
RVA23, Multi-cluster, Hypervisor and Android
- 64-bit out-of-order 4 wide decode 13-stage CPU core with 128 reordering buffers and 8 functional pipelines
- Symmetric multiprocessing up to 8 cores
- Private L2 cache support
- Level-3 shared cache and coherence support
High-performance Linux-capable application core with a 12-stage dual-issue out-of-order pipeline, and cache coherency
- SCR7 is a high-performance, silicon-proven, Linux-capable 64-bit RISC-V processor core optimized for applications that demand powerful data processing capabilities.
- The SCR7 core supports RISC-V standard "I" Integer, "M" Integer Multiplication and Division, "A" Atomic, "C" 16-bit Compressed, "F" Single-Precision Floating-Point, "D" Double-Precision Floating-Point, "B" Bit Manipulation, and "K" Scalar Cryptography extensions.
High-performance Linux-capable application core with a 12-stage dual-issue out-of-order pipeline, a VPU, cache coherency, and a hypervisor
- SCR9 is a high-performance, silicon-proven, Linux-capable 64-bit RISC-V processor core for entry-level server-class applications and personal computing devices.
- The SCR9 core supports RISC-V standard "I" Integer, "M" Integer Multiplication and Division, "A" Atomic, "C" 16-bit Compressed, "F" Single-Precision Floating-Point, "D" Double-Precision Floating-Point, "V" Vector Operations, "B" Bit Manipulation, and "K" Scalar Cryptography extensions.