Overcome signal attenuation, noise and jitter interference challenges in USB 3.0 system design By April 5, 2012
Optimizing performance, power, and area in SoC designs using MIPS multi-threaded processors By April 4, 2012
Unified C-programmable ASIP architecture for multi-standard Viterbi, Turbo and LDPC decoding By March 26, 2012
Software generated BCH as a way to solve challenges of providing multiple configuration IP By March 5, 2012