Design Constraint Verification and Validation: A New Paradigm
June 18, 2007
Semiconductor IP Articles Archive - Page 130 of 226
Practical Power Network Synthesis For Power-Gating Designs
June 18, 2007
Verification of a single-chip Analog TV and Digital TV ASIC
June 14, 2007
Using customizable MCUs to bridge the gap between dedicated SoC ASSPs, ASICs and FPGAs: Part 1
June 14, 2007
Designing Low Power Standard Cell Library With Improved Drive Granularity
June 11, 2007
OTP for DCP Key Storage
June 11, 2007
Tested and effective methods for speeding up DSP algorithms
June 11, 2007
Developing a Reusable IP Platform within a System-on-Chip Design Framework targeted towards an Academic R&D Environment
June 7, 2007
Using FPGAs to interface with digital communication protocols
June 7, 2007
FPGA Prototyping of Complex SoCs: RTL code migration and debug strategies
June 4, 2007
Floating- to fixed-point MATLAB algorithm conversion for FPGAs
June 4, 2007
A Platform Based SoC Design Environment
May 31, 2007
How to design an Interlaken to SPI-4.2 bridge
May 31, 2007
Achieving Certified IP Quality Efficiently
May 29, 2007
RAID6 accelerator in a PowerPC IOP SOC
May 28, 2007
Embedded-system validation spans inception to signoff
May 28, 2007
A Unified CPU Model for SOC Verification
May 24, 2007
Timing Constraints Generation Technology
May 24, 2007
Realizing the Performance Potential of a PCI-Express IP
May 21, 2007
Standard Debug Interface Socket Requirements For OCP-Compliant SoC
May 21, 2007