Opto-electronics -> Merging materials key to SoC optical success

Merging materials key to SoC optical success

EETimes

Merging materials key to SoC optical success
By Craig Matsumoto, EE Times
February 22, 2002 (8:57 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020214S0036

The answer is always easy in CMOS: You shrink the die, you integrate it with neighboring shrunken die. Shrink, integrate, repeat. The end game is the so-called system-on-chip (SoC), where all the circuitry of a system is produced on a single die, minus fudge-factor FPGAs and discretes, of course. And they all lived happily ever after.

But in optical networking, the SoC caravan is approaching a roadblock as network speeds surpass 10 Gbits/second. The electronics might still be in CMOS-Broadcom Corp. has said its CMOS can do the job even at 40 Gbits/s-but CMOS isn't ideal for photonics devices like lasers, modulators and photodetectors. There, designers turn to gallium arsenide (GaAs), indium phosphide (InP) and other "III-V" compounds, so named for their positions on the periodic table.

That means the would-be SoC for optical networks will have to merge different types of materials. And as of today, there's no convenient way to do that. " The fundamental problem is that GaAs and InP have a different lattice constant than silicon. To really solve the problem, you have to almost engineer the lattice of the silicon," said George Ugras, general partner with Adams Capital Management (Palo Alto, Calif.).

Still, there's an ongoing push to develop the monolithic integration that would combine silicon and III-V materials. Some early startups on this path have succumbed to the recession, but others continue to pop up. For example, Ugras' firm has funded AmberWave Systems Corp. (Salem, Mass.), which is investigating ways to alter the lattice structure of strained silicon.

Elsewhere, researchers are pursuing quantum-well techniques, as explained in a contribution by Craig Hamilton and John Marsh of Intense Photonics Ltd. (High Blantyre, Scotland). Their article discusses quantum-well intermixing, which can be used to craft two-dimensional structures such as multiplexers and demultiplexers. Another startup exploring quantum-well technique s is DenseLight Semiconductors Pte. Ltd., which is fashioning optical components out of InP.

But for more-established companies, monolithic integration is too immature to be practical, particularly considering the cost of developing the proper technology. "You need to be pretty sure that the product is going to be a high enough runner to get your money back," said Mathew Arcoleo, a senior marketing manager with Cypress Semiconductor Corp. (San Jose, Calif.).

One pragmatic alternative is hybrid integration, which uses flip-chip techniques to build optoelectronic modules. Here, silicon-based elements, such as driver electronics for the laser, are built as a normal semiconductor. The nonsilicon elements such as the laser itself are then bonded onto the silicon with ordinary flip-chip technology.

Bookham Technology Ltd. (Abingdon, England) made this kind of integration a key to its ASOC dev ices, in which passive elements are etched onto the silicon-on-insulator devices but active photonics such as lasers are bonded on separately. Hybrid integration on ordinary SiGe is a possibility too, as Axel Reisinger and Mani Sundaram of TeraConnect Inc. (Nashua, N.H.) discuss in their article.

A literal SoC for optoelectronics may remain forever out of reach, because it may never be possible to integrate lithium niobate (LiNO3)-a choice material for laser modulators-with silicon. But researchers are showing that monolithic integration holds some promise for simplifying optical-networking systems of the future, and hybrid integration appears to be a satisfactory alternative for the here-and-now. "If you can build a 'module' and get it down to two or three ICs, that's still a step in the right direction," said Marc Hartranft, business unit director of Cypress' optics division.

Copyright © 2003 CMP Media, LLC | Privacy Statement
×
Semiconductor IP