Different platform types are needed for SoC design

Different platform types are needed for SoC design
By Jauher Zaidi, EEdesign
January 31, 2003 (7:47 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030131S0057

The semiconductor industry has been trying to define the term "platform" for the past few years. With each passing day it becomes even more confusing, as everyone from tools vendors to semiconductor fabs are jumping on the platform bandwagon with their own definition.

The reality is that there may be several kinds of platforms required to build a chip. It is analogous to the automotive industry that pioneered the platform concept back in the early 1980's. Prior to then, the automotive manufacturer made everything required to build a car, from headlights to headliners. As competition emerged from Asia, and reliability and cost became huge issues, the carmakers developed the platform approach to standardize on common platforms across several makes and models.

They divided the car into different platforms or sub-platforms. For instance, there is the chassis platform, the interior platform, and the electrical platform. This led directly to outsour cing significant segments of the automotive hardware. The result was greatly improved quality and reduced design cycles for follow-on models, which translated into huge cost savings.

Similarly, the semiconductor industry is segmenting into sub-platforms that track a chip from concept through manufacturing. Today, we are seeing tool companies like Mentor Graphics, Cadence, and Synopsys providing a design platform; SoC providers like Palmchip and ARM supply an application or generic platform; and the manufacturing companies such as TSMC and UMC provide a test and verification platform.

What is a platform?
Given the opportunity provided by platforms and the proliferation of the number and types of companies providing them, it becomes increasingly important that customer understand what each vendor means when they say "platform." A platform should consist of a basic set of integrated technologies that defines how the system should function.

Let's take the system-on-chip platform, for e xample. A SoC platform can be divided into two basic categories -- generic and application specific. The definition of a generic SoC platform is one that contains, at a minimum, a CPU core, memory controller, UART, timer, watchdog, LCD controller, and general purpose I/Os with an underlying bus architecture to tie it all together -- something like ARM's AMBA-based PrimeXsys or Palmchip's Matrix-based AcurX platform.

The application specific platform contains most of generic list above plus it contains pre-integrated IP blocks for the given application. For example, the Parthus Bluesteam platform contains the Bluetooth baseband controller and software stack. And similarly, Palmchip's Greenlite and LinuxPak contain all the IP blocks and software required to build a single chip mobile drive controller and a single chip Linux sever respectively.

Platform advantages
Including a SoC platform in the design methodology will have several advantages. It will reduce integration risk by insuring that all IP works together, reduce licensing and contractual negotiation time by limiting the platform to just one license, and significantly reduce cost by allowing for the bulk of the platform to be reused in multiple follow-on designs.

It is estimated that in the near future each SoC design will consist of 10 to 15 different IP blocks from 6 to 8 IP vendors. Let's suppose it takes 6 to 8 weeks per IP vendor for evaluation, negotiation, and integration of IP into the system. That means with 8 different IP vendors the customer will bear 64 weeks of hidden cost.

If, for example, the overhead cost is $10,000 per week (engineering, legal, management), that's an additional cost of $640,000 just to assemble the IP for the chip. This cost does not include the actual IP licensing and royalty fees nor does it include the cost of verifying that all the IP blocks are fully functional within the system. This verification cost alone can easily reach $800,000. On top of all that, it does not reduce the risk because the design is still not yet proven in silicon.

One can see what a nightmare it is to develop a SoC without a platform approach. The platform solves the cost and time issues as well as mitigating the risk. As SoC companies provide pre-integrated, pre-verified platforms, customers need only sign one licensing agreement, have only one royalty payment and can save the $1.4M in hidden costs.

The SoC platform is a disruptive technology, which, if used, can cut ten to twelve months off the design cycle. It is estimated that it costs about $4.5M¹ to design a chip from a clean sheet of paper without using the SoC platform approach. So it is pretty obvious that cutting ten to twelve months off the design cycle could have a dramatic affect on the overall chip cost. While that advantage is easily understood, perhaps a more important advantage is having the product hit the market window dead-on and realize its full profit potential.

While some may believe adopting a platform strategy indust ry wide is years away, it can be compared to the adoption of the EDA chip synthesis tools in early 80's. Engineers used to perform chip synthesis by hand. They didn't use synthesis tools from Cadence or Synopsys because they were perceived as far too expensive. However, as these tools demonstrated a better ROI than the hand method, the whole industry moved to synthesis tools for converting logic design to gates.

The conversion shaved an average of between six to nine months off the chip design cycle. Similary, as chips continue to grow in size and functionality, design practices will have to change again because it is no longer a good return on the investment to do a ground-up design. It is much more cost effective to design a chip with a pre-build, pre-verified platform with application specific IP blocks. This will be especially true as designs exceed three million gates.

SoC platforms have been around a while, but only recently have they become a buzzword. In essence, they are now coming of age because the requirements for ever-increasing functionality, driving down cost, and shrinking time-to-revenue demands are forcing companies to a better way. And like EDA synthesis tools, the ROI for SoC platforms is quickly becoming obvious, and implementing the platform methodology in the design flow is the only way to stay competitive.

¹Tech Venture Management, IEEE Spectrum, March 2002.

Jauher Zaidi is Chairman and CEO of Palmchip.