Mobileye's System-on-Chip Delivers 2nd Generation Solution for Visual Recognition and Interpretation
Amstelveen, Netherlands -- February 27, 2008 - The Mobileye EyeQ2™ reflects a new philosophy of vision based processing platform, includes optimal combination for Vision Scalar and Vector processing on a single die, based on Mobileye algorithm knowledge.
EyeQ2™, Mobileye's System-on-Chip (SoC) delivers a 2nd generation solution for computationally intensive applications for real-time visual recognition and scene interpretation and has cabin-grade automotive qualification for use in intelligent vehicle systems. The Mobileye EyeQ2™ reflects a new Philosophy of Vision based processing platform, includes optimal combination for Vision Scalar and Vector processing on a single die, based on Mobileye algorithm knowledge.
Mobileye EyeQ2™ will be launched in 2009 start of production involving a consolidated feature package with lanes, vehicles, pedestrian and fusion. Manufactured by STMicroelectronics, the concept behind the EyeQ2 is twofold:
- Mobileye EyeQ2™ is six times more powerful than the first generation Mobileye EyeQ™, thus allowing a higher degree of feature consolidation
- Mobileye EyQ2™ is multi-threaded thus allowing for an easier combination of different IPs, some from Mobileye and others from 3rd parties working in tandem with Mobileye software.
• Programmable ASIC
• Parallelism, 11 computing processors working simultaneously
• On chip 1M Byte of SRAM
• Vision application minded design
• Automotive qualified
The chip architecture is designed to run a full-fledged application on a single chip, and is completely programmable to accommodate a wide range of visual processing applications beyond automotive specific applications.
Mobileye EyeQ2™ is manufactured using the leading STMicroelectronics CMOS 90nm-micron technology, operating at 332Mhz. To optimize costp erformance, all peripheral interfaces are integrated in to the SoC, including dual CAN Controllers; dual UART, I2C, Mobile DDR SDRAM controller, parallel I/O, dual Video image data capture and video out units.
Mobileye’s SDK (System Development Kit) for Mobileye EyeQ2™ provides a well defined working environment for use by developers and programmers of applications based on the Mobileye EyeQ2™ SW and is highly suited also for inexperienced developers. Provided with Mobileye Vision algorithms as libraries.
The Mobileye EyeQ2™ architecture consists of two floating point, hyper-thread 64bit RISC 34KMIPS CPUs, five Vision Computing Engines (VCE), three Vector Microcode Processors (VMP™), Denali 64bit Mobile DDR Controller, 128bit internal Sonics Interconnect, dual 16bit Video input and 18bit Video output controllers, 16 channels DMA and several peripherals. The MIPS34K CPU manages the five VCEs, three VMP™ and the DMA, the second MIPS34K CPU and the multi-channel DMA as well as the other Peripherals. The five VCEs, three VMP™ and the MIPS34K CPU perform all the intensive vision computations required by the applications such as tracking and pattern classification.
EyeQ2™, Mobileye's System-on-Chip (SoC) delivers a 2nd generation solution for computationally intensive applications for real-time visual recognition and scene interpretation and has cabin-grade automotive qualification for use in intelligent vehicle systems. The Mobileye EyeQ2™ reflects a new Philosophy of Vision based processing platform, includes optimal combination for Vision Scalar and Vector processing on a single die, based on Mobileye algorithm knowledge.
Mobileye EyeQ2™ will be launched in 2009 start of production involving a consolidated feature package with lanes, vehicles, pedestrian and fusion. Manufactured by STMicroelectronics, the concept behind the EyeQ2 is twofold:
- Mobileye EyeQ2™ is six times more powerful than the first generation Mobileye EyeQ™, thus allowing a higher degree of feature consolidation
- Mobileye EyQ2™ is multi-threaded thus allowing for an easier combination of different IPs, some from Mobileye and others from 3rd parties working in tandem with Mobileye software.
• Programmable ASIC
• Parallelism, 11 computing processors working simultaneously
• On chip 1M Byte of SRAM
• Vision application minded design
• Automotive qualified
The chip architecture is designed to run a full-fledged application on a single chip, and is completely programmable to accommodate a wide range of visual processing applications beyond automotive specific applications.
Mobileye EyeQ2™ is manufactured using the leading STMicroelectronics CMOS 90nm-micron technology, operating at 332Mhz. To optimize costp erformance, all peripheral interfaces are integrated in to the SoC, including dual CAN Controllers; dual UART, I2C, Mobile DDR SDRAM controller, parallel I/O, dual Video image data capture and video out units.
Mobileye’s SDK (System Development Kit) for Mobileye EyeQ2™ provides a well defined working environment for use by developers and programmers of applications based on the Mobileye EyeQ2™ SW and is highly suited also for inexperienced developers. Provided with Mobileye Vision algorithms as libraries.
The Mobileye EyeQ2™ architecture consists of two floating point, hyper-thread 64bit RISC 34KMIPS CPUs, five Vision Computing Engines (VCE), three Vector Microcode Processors (VMP™), Denali 64bit Mobile DDR Controller, 128bit internal Sonics Interconnect, dual 16bit Video input and 18bit Video output controllers, 16 channels DMA and several peripherals. The MIPS34K CPU manages the five VCEs, three VMP™ and the DMA, the second MIPS34K CPU and the multi-channel DMA as well as the other Peripherals. The five VCEs, three VMP™ and the MIPS34K CPU perform all the intensive vision computations required by the applications such as tracking and pattern classification.
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- CAN-FD Controller
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
Related News
- NeuriCam chooses ARC microprocessor for automotive and fingerprint recognition applications
- Bops discloses new cores targeted at improving 3D graphics and visual realism
- Altera Endorses Summit Design's Visual IP as the Platform for Delivering Protected Simulation Models for Its IP MegaCore Functions
- Summit Design Launches Visual IP Version 3.0 for PC Platform Support
Latest News
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP
- Perceptia Begins Port of pPLL03 to Samsung 14nm Process Technology
- Spectral Design and Test Inc. and BAE Systems Announce Collaboration in RHBD Memory IP Development