ESL panelists call for TLM standards
(07/26/2006 1:27 AM EDT)
SAN FRANCISCO, Calif. — Electronic system level (ESL) design is making considerable progress, but standards that will help make SystemC transaction-level models (TLMs) interoperable are desperately needed, according to panelists at Summit Design Automation's ESL Symposium at the Design Automation Conference here Tuesday. And with a newly-released standards roadmap from Open SystemC International (OSCI), they may get their wish.
Although SystemC establishes a language standard, users are having difficulty integrating SystemC TLMs from outside their companies into their design flows. The OSCI TLM 1.0 standard defines a set of APIs for transaction-level communications, but does not define the content of the transactions. That's a task left for the TLM 2.0 standard that's now under development.
To read the full article, click here
Related Semiconductor IP
- ISO/IEC 7816 Verification IP
- 50MHz to 800MHz Integer-N RC Phase-Locked Loop on SMIC 55nm LL
- Simulation VIP for AMBA CHI-C2C
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- USB 20Gbps Device Controller
Related News
- DAC panelists call for IP reuse standards
- ESL needs more work, panelists say
- Mentor Graphics Announces Scalable TLM-2.0 Design Flow Using Vista and Catapult C Synthesis Electronic System Level (ESL) Design Tools
- IP99: Panelists debate core values
Latest News
- Quintauris and Andes Technology Partner to Scale RISC-V Ecosystem
- Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
- Intel Unveils Panther Lake Architecture: First AI PC Platform Built on 18A
- TSMC September 2025 Revenue Report
- Andes Technology Hosts First-Ever RISC-V CON in Munich, Powering Next-Gen AI and Automotive Solutions