CAD benchmarks may improve MP3/MPEG decoders
Richard Goering, EE Times
(06/26/2007 9:30 PM EDT)
Will an effort to develop public domain benchmarks for CAD research lead to more energy-efficient MP3 and MPEG2 decoders? It's a possibility, according to researchers at McMaster University in Hamilton, Ontario (Canada).
Frustrated by the lack of public domain benchmarks for real-world applications, Nicola Nicolici, associate professor of electrical and computer engineering at McMaster University, joined with two graduate students to develop Verilog source files for MP3 audio and MPEG2 audio/video decoders. What started as a side project to build benchmarks for CAD research has turned into a full-time effort to improve the energy efficiency of MP3 and MPEG2 micro-architectures.
(06/26/2007 9:30 PM EDT)
Will an effort to develop public domain benchmarks for CAD research lead to more energy-efficient MP3 and MPEG2 decoders? It's a possibility, according to researchers at McMaster University in Hamilton, Ontario (Canada).
Frustrated by the lack of public domain benchmarks for real-world applications, Nicola Nicolici, associate professor of electrical and computer engineering at McMaster University, joined with two graduate students to develop Verilog source files for MP3 audio and MPEG2 audio/video decoders. What started as a side project to build benchmarks for CAD research has turned into a full-time effort to improve the energy efficiency of MP3 and MPEG2 micro-architectures.
To read the full article, click here
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- CAN-FD Controller
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
Related News
- Arithmetic Processing IP Core for MP3 Decoders Feature Smallest Circuit Size and Lowest Power Consumption
- Axis' Verification Tools Selected by Vweb to Speed the Development of New MPEG CODEC <!-- verification -->
- Chameleon cuts staff, plans to improve processor
- Genesys Testware Adds Support for Fuse Arrays to Improve the Yield of Embedded Memories
Latest News
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP
- Perceptia Begins Port of pPLL03 to Samsung 14nm Process Technology
- Spectral Design and Test Inc. and BAE Systems Announce Collaboration in RHBD Memory IP Development