Andes Technology Showcases RISC-V AI Leadership at RISC-V Summit Europe 2025
At Booth #11, Andes will highlight its cutting-edge RISC-V solutions with live CPU demos and share the latest developments through technical presentations and posters.
Paris, France – May 12, 2025 – Andes Technology, the leader in RISC-V processor solutions and a Founding Premier member of RISC-V International, will participate as a Gold Sponsor in the prestigious RISC-V Summit Europe 2025 in Paris from May 12-15. Andes will showcase its latest innovations in AI and embedded systems, including a live demo of Android 15 (Vanilla Ice Cream) running on its in-house developed QiLai SoC.
Key Highlights:
-
Dr. Charlie Su, CTO and President at Andes, will spotlight how Andes RISC-V processor solutions are accelerating AI/ML SoC innovation in the demo theatre speech “Accelerating AI/ML SoCs with Andes RISC-V Solutions” on May 13 at 13:35.
- Nick Pei-Hsiang Hung, Andes Technical Manager of Software, will present how Andes accelerates AI workloads—from CNNs to LLMs—using its AMM instruction set, an extension to RVV that features 8-bit optimized matrix operations and efficient 2D memory access in his talk “Accelerating AI Models with Andes Matrix Multiplication (AMM) and RISC-V Vector (RVV) Extensions: From CNNs to LLMs” on May 13 at 12:45.
- Niraj Dengale, Senior FAE at Andes, will deliver a talk on “Enter the RISC-V AI era with Andes” on May 13 at 15:02.
As a recognized innovator and key contributor in the RISC-V community, Andes will present posters on efficient LLM inference, sparse computation using vector extensions, and secure debugging for MCUs. Engage with our experts to discover how these advancements are driving the future of RISC-V at Expo area during breaks and lunches.
Exhibitions at Booth #11 and Developer Zone:
- QiLai SoC and Voyager Development Board: Andes will showcase the QiLai SoC, powered by a quad-core AX45MP processor and NX27V vector processor, demonstrating Android 15 running on RISC-V hardware in a live demo.
- Developer Zone: Andes will also feature three AndesCore-based development boards from customers, including:
- Tinker V: The first RISC-V Single-Board Computer (SBC) from ASUS IoT, featuring the AndesCore™ AX45MP.
- HPMicro: A RISC-V MCU built with the AndesCore™ D45, supported by a comprehensive IDE.
- Voyager: Showcasing Andes’ advanced QiLai SoC solutions.
Session Details:
Date |
Type |
Time |
Topic |
Speaker |
May 13 (Tue) |
Presentations |
12:45 -13:00 |
Accelerating AI Models with Andes Matrix Multiplication (AMM) and RISC-V Vector (RVV) Extensions: From CNNs to LLMs |
Nick Pei-Hsiang Hung Manager of Software |
Demo Theatre |
13:35 -13:45 |
Accelerating AI/ML SoCs with Andes RISC-V Solutions |
Dr. Charlie Su CTO and President |
|
Lighting Talk |
15:02 |
Enter the RISC-V AI Era with Andes |
Niraj Dengale Senior FAE |
|
Poster |
All Day |
Accelerating Quantized LLM Inference for Embedded RISC-V CPUs with Vector Extension (RVV) |
Frank Lee Manager of Compute Acceleration |
|
Supporting Sparse Inference in XNNPACK with RISC-V Vector Extension |
Alan Kao Manager of Compute Acceleration |
|||
May 14 (Wed) |
Poster |
All Day |
Secure Domain-Specific Debugging on an MCU |
Alvin Chang Processor security architect of Architecture |
Join us at Booth #11 and the Developer Zone to witness the latest advancements in RISC-V technology and engage with Andes experts.
For more information, please visit the RISC-V Summit Europe website.
About Andes Technology
As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is driving the global adoption of RISC-V. Andes’ extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices. Over 16 billion Andes-powered SoCs are driving innovations globally. Discover more at www.andestech.com
Related Semiconductor IP
- Compact, Secure and Performance Efficiency 32-bit RISC-V Core
- 64-bit CPU with RISC-V Vector Extension
- Compact High-Speed 64-bit CPU for Real-time and Linux Applications
- All-In-One RISC-V NPU
- Configurable RISC-V processor IP core
Related News
- Andes Technology Showcases Leadership in AI and Automotive Applications at RISC-V Summit Europe 2024
- Ventana CEO to Deliver a Keynote at RISC-V Summit Europe
- KEYSOM is heading to RISC-V Summit Europe in Paris
- Axiomise Featured Gold Sponsor at RISC-V Summit Europe Next Week in Paris