Mirabilis Design Signs OEM Agreement with Cadence to Deliver VisualSim for System-Level Modeling and Performance Optimization 2025-06-23 11:32:00 EDA
Caspia Technologies Collaboration to Enhance Security Verification in Siemens' Questa One With Caspia's Generative AI Security Platform 2025-06-23 10:07:00 EDA
True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference 2025-06-20 08:26:00 Event
Launch of BrainChip Developer Hub Accelerates Event-Based AI Innovation on Akida™ Platform with Release of MetaTF 2.13 2025-06-20 07:54:00 Embedded Systems
Agnisys Ignites DAC 2025 with IDesignSpec Suite v9, IDS-FPGA Launch, AI² and IDS-Integrate Enhancements. 2025-06-19 17:36:00 EDA
ZeroRISC Gets $10 Million Funding, Says Open-Source Silicon Security ‘Inevitable’ 2025-06-19 09:11:00 Commentary / Analysis
VESA® Approves Teledyne LeCroy DisplayPort™ 2.1 PHY Compliance Test Specification Software 2025-06-18 19:09:00 EDA
Keysight Enables AMD to Showcase Electrical PCI Express® Compliance up to 64 GT/s 2025-06-18 18:53:00 Embedded Systems
Baya Systems Celebrates First Year of Hypergrowth After Emerging from Stealth 2025-06-18 16:11:00 Business
Astera Labs and Alchip Announce Strategic Partnership to Advance Silicon Ecosystem for AI Rack-Scale Connectivity 2025-06-18 13:22:00 Business
Siemens collaborates with Samsung Foundry on advanced node product certifications and EDA innovation 2025-06-18 13:17:00 EDA
DCD-SEMI Joins MIPI Alliance and Unveils Latest I3C IP at MIPI Plugfest Warsaw 2025 2025-06-18 12:52:00 Standard
CEA-Leti and Soitec Announce Strategic Partnership to Leverage FD-SOI for Enhanced Security of Integrated Circuits 2025-06-18 08:11:00 Research
BOS Joins VESA and UCIe to Advance Global Standards in Display and Chiplet Technology 2025-06-17 15:50:00 Standard
Marvell Develops Industry’s First 2nm Custom SRAM for Next-Generation AI Infrastructure Silicon 2025-06-17 15:45:00 Chip