Imperas and Imagination collaborate on providing virtual platform models for the Catapult RISC-V CPU family 2022-12-08 16:46:00 EDA
Allegro DVT and V-Nova announce strategic collaboration to accelerate development of LCEVC ecosystem 2022-12-08 16:46:00 Business
Imec enables tight standard cell boundary scaling using a two-level semi-damascene integration scheme 2022-12-08 16:45:00 Other
Imagination PowerVR SDK wins Design Tool and Development Software Product of the Year 2022-12-08 16:45:00 Other
Join Andes at RISC-V Summit; Learn the Only ISO 26262 Fully-Compliant RISC-V CPU, the Latest Multicore 4-Way Out-Of-Order Processor & the Multicore 1024-bit Vector Processor 2022-12-08 16:45:00 Other
Andes Technology and Parasoft Collaborate to Provide Seamless Software Testing Tools for Automotive Functional Safety Applications 2022-12-07 16:23:00 Embedded Systems
MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class Processors 2022-12-07 15:05:00 EDA
Mixel Patented MIPI D-PHY RX+ IP Integrated into Lumissil Automotive Microcontroller 2022-12-06 15:38:00 Deals
Arteris FlexNoC Interconnect Licensed by Telechips for Use in Advanced Automotive Applications 2022-12-06 14:30:00 Deals
Israeli AI startup NeuReality raises $35M Series A to bring its novel inferencing chip to the market 2022-12-06 14:25:00 Business
Avery Design Systems Announces SimXACT-SA™ for Improved Sequential X-Verification 2022-12-06 14:07:00 EDA
Intel Pathfinder for RISC-V: New Capabilities and A Growing Ecosystem 2022-12-06 08:31:00 Embedded Systems
IEEE802.11n/ac/ax Wi-Fi LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core 2022-12-06 03:45:00 IP
QuickLogic Inks eFPGA IP Partnership Agreement with Yu-Hsin Layout Technology 2022-12-06 02:24:00 Business