AccelerComm Announces 5G PUSCH Channel Equalizer
2023-07-03 14:41:00
IP Cores & Design
Chiplet News Archive - Page 165 of 1945
Tiempo Secure's new TESIC RISC-V IP successfully passes SERMA CC EAL5+ security assessment tests
2023-07-03 13:25:00
IP Cores & Design
ADTechnology Joins Synopsys IP OEM Partner Program
2023-07-03 11:35:00
Strategic Partnerships
OPENEDGES Showcases Live Demo of PHY Vision at Design Automation Conference (DAC) 2023
2023-07-03 10:41:00
Misc
Single Carrier Modem Available For Immediate Licensing From Global IP Core
2023-07-03 08:56:00
IP Cores & Design
StarFive and Youyeetoo jointly delivered the official metal case for VisionFive 2
2023-07-03 02:29:00
SoC Architecture & Assembly
Synopsys and Golden Electronics Collaborate to Expand Chip Design Talent in Jordan
2023-07-03 02:25:00
Misc
Bluetooth Dual Mode V5.3 RF Transceiver IP Cores in 40nm ULP is Available for Immediate Licensing
2023-07-03 01:08:00
Misc
CAST Introduces New MACsec Protocol Engine IP Cores
2023-06-30 07:53:00
IP Cores & Design
Secure-IC's Securyzr achieves ISO 26262 ASIL-D certification, reinforcing its commitment to Automotive Safety and Security
2023-06-29 16:47:00
IP Cores & Design
Weebit Nano's ReRAM IP now fully qualified in SkyWater Technology's S130 process
2023-06-29 16:46:00
IP Cores & Design
Quadric Joins the Silicon Catalyst In-Kind Partner Ecosystem
2023-06-29 16:46:00
Misc
AMD Introduces World's Largest FPGA-Based Adaptive SoC for Emulation and Prototyping
2023-06-29 16:46:00
SoC Architecture & Assembly
Worldwide Semiconductor Foundry Market Grew 27.9% YoY in 2022, Projected to Decrease by 6.5% YoY in 2023 due to Inventory Adjustments, IDC Finds
2023-06-29 16:46:00
Analysis & Insight
Korean prosecutors name ex-Samsung exec who tried to set up copy-cat fab in China and the Taiwanese backer
2023-06-29 16:46:00
Analysis & Insight
OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services
2023-06-29 16:46:00
EDA & Design Tools
Samsung Foundry Certifies Cadence Virtuoso Studio Flow to Automate Analog IP Migration on Advanced Process Technologies
2023-06-29 16:46:00
EDA & Design Tools
Cadence Digital and Custom/Analog Design Flows Certified for Samsung Foundry's SF2 and SF3 Process Technologies
2023-06-29 16:46:00
EDA & Design Tools
Cadence Delivers Certified, Innovative Backside Implementation Flow to Support Samsung Foundry SF2 Technology
2023-06-29 16:46:00
EDA & Design Tools
Cadence Expands Collaboration with Samsung Foundry, Providing Differentiated Reference Flows Based on the Integrity 3D-IC Platform
2023-06-29 16:46:00
EDA & Design Tools