Foundries have 28-nm yield issues, say execs
Peter Clarke and Dylan McGrath
EETimes (11/2/2011 12:08 PM EDT)
LONDON – Although foundry chip manufacturing will continue to grow faster than the overall chip market for the next few years, it is currently facing challenges at the leading-edge 28-nm manufacturing node, according to market analysis company Gartner and others.
In particular foundries are struggling with the introduction of 32-nm/28-nm high-K metal gate (HKMG) CMOS, according to Bob Johnson, research vice president at Gartner, speaking to a client meeting here.
To read the full article, click here
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related News
- UMC denies 65-nm yield issues
- Yield And Reliability Issues With Integrating IP
- Date 2002 conference to spotlight IP, SoC issues
- Genesys Testware Adds Support for Fuse Arrays to Improve the Yield of Embedded Memories
Latest News
- Quadric Announces Lee Vick is New VP Worldwide Sales
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification