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fault-tolerant IP

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Search (22)
Compare 22 IP from 6 vendors (1 - 10)
  • SpaceWire CODEC
    • The GRSPW_CODEC core implements a SpaceWire encoder-decoder with a 9-bit wide FIFO host interface in each direction. The core complies to the SpaceWire standard (ECSS-E-ST-12C).
    • Data is transmitted and received through 9-bit wide FIFOs with configurable depth. The core also provides an interface for transmitting and receiving Time-codes as well as configuring the link properties such as the link rate.
    Block Diagram -- SpaceWire CODEC
  • FlexRay - High-speed, reliable communication for safety-critical systems
    • FlexRay is a high-speed communication protocol designed for time-critical automotive and industrial applications. It ensures reliable, fault-tolerant communication, essential for safety-critical systems like ADAS, powertrains, and chassis control.
    • FlexRay Verification IP (VIP) ensures compliance with FlexRay standards, simulating message transmission, scheduling, error detection, fault tolerance, and real-time synchronization across nodes. This testing ensures system reliability and reduces design flaws during development.
    Block Diagram -- FlexRay - High-speed, reliable communication for safety-critical systems
  • ARINC 429 IP Core
    • Implements ARINC 429 Data Bus Communication Protocol.
    • Supports both Transmit and Receive functionality for ARINC 429 words.
    • Configurable data rates for flexible integration into avionics systems.
    • Provides advanced error detection mechanisms for high data integrity.
    • Bare-metal application or PetaLinux OS with associated APIs.
    Block Diagram -- ARINC 429 IP Core
  • FlexRay Controller
    • Flexray is more reliable compared to CAN, LIN.
    • Flexray is more faster compared to CAN, LIN.
    • High data rates.
    Block Diagram -- FlexRay Controller
  • I3C I/O Library
    • Supported I3C operating modes:
    • In open-drain modes, this cell requires a pull-up to a high voltage power supply (VDDP). The sizing of an external resistor or appropriate pull-up network is application dependent.
  • 1.2V GPIO library designed for the SVID three-line interface.
    • Open drain operation only
    • Operating frequency – up to 25MHz
    • Fault-tolerant to 1.32V at PAD (no current flow when DVDD = 0V)
    • Output enable
  • I2C I/O Pad Set
    • I2C Bi-directional Driver Features
    • An open-drain design, this cell requires an external pull-up resistor to a high voltage power supply. Designed for a 1.8V I2C bus application, VDDP can track DVDD but it is not necessary. The sizing of the external resistor or appropriate pull-up network is application dependent.
  • SD 3.0 I/O Pad Set
    • Dual voltage operation (1.8V & 3.3V)
    • Fault-tolerant operation (no current flow when DVDD = 0V at VPAD <= 3.63V)
    • Programmable drive strength
    • Selectable output slew-rate (slow / fast)
  • 3.3V Wide-Range General Purpose I/O Pad Set
    • Multi-Voltage (1.2V, 1.5V, 1.8V)
    • LVCMOS / LVTTL input with selectable hysteresis
    • Programmable drive strength (rated 2mA to 12mA)
    • Selectable output slew rate
  • 32-bit Embedded RISC-V Functional Safety Processor
    • The EMSA5-FS is a processor core designed for functional safety.
    • The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing the RISC-V Instruction Set Architecture (ISA).
    Block Diagram -- 32-bit Embedded RISC-V Functional Safety Processor
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