I2C I/O Pad Set
Overview
The I2C libraries provide the bidirectional I/O for two-line serial communication per Rev. 4 of the I2Cbus industry specification. The design is compatible with Standard-mode, Fast-mode, and Highspeed mode I 2C operating modes.
Key Features
- I2C Bi-directional Driver Features
- Supported I2C operating modes:
- Standard-mode (Sm) – 100 Kbps data rate
- Fast mode (Fm) – 400 Kbps data rate
- Fast mode (Fm+) – 1.0 Mbps data rate
- High-speed mode (Hs) - 3.4 Mbps data rate
- Open drain operation only
- Built-in output slew rate control to meet I2C Tof minimum of (20 x VDDP/5.5V) ns
- Output enable and mode select
- Receiver enable
- ESD protection is accomplished with an SCR (no diode to the positive power supply)
- Standard LVCMOS compatible input with optional Schmitt trigger (hysteresis)
- Power-on sequencing independent design with Power-On Control
- DVDD = 1.62V to 1.98V
- Pad VDDP = 1.62V to 1.98V – independent of DVDD
- The circuit consumes no DC supply current in the static state
- Fault-tolerant to 1.98V at PAD (no current flow when DVDD = 0V)
- An open-drain design, this cell requires an external pull-up resistor to a high voltage power supply. Designed for a 1.8V I2C bus application, VDDP can track DVDD but it is not necessary. The sizing of the external resistor or appropriate pull-up network is application dependent.
Deliverables
- Physical abstract in LEF format (.lef)
- Timing models in Synopsys Liberty formats (.lib and .db)
- Calibre compatible LVS netlist in CDL format (.cdl)
- GDSII stream (.gds)
- Behavioral Verilog (.v)
- Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- Databook (.pdf)
- Library User Guide - ESD Guidelines (.pdf)
Technical Specifications
Foundry, Node
TSMC 16nm
Maturity
Pre-Silicon
Availability
Available Now
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