PCI IP

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Compare 1,039 IP from 90 vendors (1 - 10)
  • PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
    • Supports 2.5Gb/s serial data rate
    • Utilizes 8-bit or 16-bit parallel interface to transmit and receive PCI Express data
    • Full Support for Auxiliary Power (Vaux) for Energy aware systems like Multi-Port Host Controllers
    • Data and clock recovery from serial stream on the PCI Express bus
    Block Diagram -- PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
  • PCI Express - Configurable PCI Express 4.0 IP
    • Compliant with "PCI Express™ Base Specification, Rev. 4.0 Version 1.0"
    • Compliant with "PHY Interface For the PCI Express, SATA, and USB3.1 Architectures"
    Block Diagram -- PCI Express - Configurable PCI Express 4.0 IP
  • PCI Express 4.0 PHY
    • Compiles with PCIe 4.0, 3.1, 2.1, 1.1 and PIPE 4.4.1 Specifications
    • Supports all power saving modes (P0, P0s, P1, P2) as defined in PIPE 4.4.1 spec.
    Block Diagram -- PCI Express 4.0 PHY
  • PCI Express Gen 1/2/3/4 Phy
    • TSMC advanced 16 nm FFC CMOS process
    • Available in 1X, 4X, 8X, and 16X configuration
    Block Diagram -- PCI Express Gen 1/2/3/4 Phy
  • 32-bit, 33 MHz PCI Target Interface Core
    • PCI specification 2.3 compliant
    • 33 MHz performance (66MHz optional)
    • 32-bit datapath
    • Zero wait states burst mode
    Block Diagram -- 32-bit, 33 MHz PCI Target Interface Core
  • PCI Express Gen 1/2/3/4 Phy
    • 2.5/5.0/8/16 Gbps per lane interface optimized for PCI Express applications
    • Compliance to PCI Express 1.0a, 1.1 and 2.1, 3.1 and 4.0 PIPE specifications
    Block Diagram -- PCI Express Gen 1/2/3/4 Phy
  • PCI Express x1, x4 Root Complex Lite IP Core
    • Download demo bitstream from the PCI Express Demo page.
    • Visit the PCI Express Solutions page for other demos, boards and development kits.
    Block Diagram -- PCI Express x1, x4 Root Complex Lite IP Core
  • PCI Express to VME64x Transparent Bridge
    • Complete PCI Express to VME64x Master/Slave Bridge
    • Improved performance compared to currently available ASIC solutions
    • PCI Express x4 GEN1/2
    • VME64x supported modes: SLT, BLT, MBLT, 2eVME and 2eSST
    Block Diagram -- PCI Express to VME64x Transparent Bridge
  • PCI Controller
    • 64-bit, 33/66MHz PCI interface
    • Supported initiator commands and functions:Parity generation, parity error detection
    • Supports a very generic user interface
    • Supported target commands and functionsType 0 configuration space header
    Block Diagram -- PCI Controller
  • PCI to AMBA AHB Host Bridge
    • PCI Host Bridge
    • PCI Interface
    Block Diagram -- PCI to AMBA AHB Host Bridge
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Semiconductor IP