IP Catalog > CPRI V7.0

CPRI v7.0 IP

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Compare 14 IP from 8 vendors (1 - 10)
  • Common Public Radio Interface (CPRI) v.7.0 IPC
    • Conforming to CPRI v.7.0: 2015-10-09 Specification
    • Support for REC / RE applications
    Block Diagram -- Common Public Radio Interface (CPRI) v.7.0 IPC
  • CPRI verification IP
    • The vendor provides configurable CPRI TX/RX verification IP
    • The CPRI verification IP is fully compatible with CPRI version v7.0 with backward compatibility to previous versions and provides an efficient and effective way to verify the component interfacing with CPRI interface of an IP
    Block Diagram -- CPRI verification IP
  • CPRI 7.0
    • The Common Public Radio Interface (CPRI) 7.0 core is a silicon agnostic implementation of the CPRI 7.0 specification, which is targeting both ASIC and FPGAs CPRI.
    • CPRI is a high-speed serial interface designed to meet or exceed the requirements of base band systems, C-RAN switches, Digital Front-End (DFE) processors or advanced test systems.
    • With its extreme flexibility and reduced logic consumption, the CPRI 7.0 IP core is the perfect match whether the application is REC (Radio Equipment Controller) or RE (Radio Equipment).
    Block Diagram -- CPRI 7.0
  • CPRI Verification IP
    • Compliant with CPRI Specification V4.2/V5.0/V6.0/V6.1/V7.0
    • Complete CPRI Tx/Rx functionality.
    • Supports the Physical link layer (Layer 1) of the CPRI specification.
    • Supports different standard line bit rates of the CPRI specification
    Block Diagram -- CPRI Verification IP
  • CPRI Synthesizable Transactor
    • Compliant with CPRI Specification V4.2, V5.0, V6.0, V6.1 and V7.0.
    • Supports complete CPRI Tx/Rx functionality.
    • Supports the Physical link layer (Layer 1) of the CPRI specification.
    • Supports different standard line bit rates of the CPRI specification
    Block Diagram -- CPRI Synthesizable Transactor
  • CPRI CONTROLLER IIP
    • Compliant with CPRI Specification V4.2, V5.0, V6.0, V6.1 and V7.0.
    • Complete CPRI Tx/Rx functionality.
    • Supports the Physical link layer (Layer 1) of the CPRI specification.
    • Supports different standard line bit rates of the CPRI specification
    Block Diagram -- CPRI CONTROLLER IIP
  • CPRI Verification IP
    • Fully compliant to CPRI specification V7.0 with backward compatibility
    • Supports following line bit rates of CPRI specifications
      • 614.4 Mbit/s, 1228.8 Mbit/s, 3072.0 Mbit/s, 4915.3 Mbit/s, 6144.0 Mbit/s, 9830.4 Mbit/s, 8110.08 Mbit/s, 10137.6 Mbit/s, 12165.12Mbit/s
    • 614.4 Mbit/s, 1228.8 Mbit/s, 3072.0 Mbit/s, 4915.3 Mbit/s, 6144.0 Mbit/s, 9830.4 Mbit/s, 8110.08 Mbit/s, 10137.6 Mbit/s, 12165.12Mbit/s
    • Supports 8B/10B and 64B/66B line coding and scrambling/ descrambling and RSFEC.
    Block Diagram -- CPRI Verification IP
  • CPRI 7.0
    • CPRI Specification V7.0 full feature set
    • All mapping methods available (2 is optional)
    • Accurate delay measurements and calibration
    Block Diagram -- CPRI 7.0
  • Ethernet 1G/2.5G/5G/10G/25G and CPRI 7.0 PCS
    • Delivers Performance
    • Feature Rich
    • Highly Configurable
    • Silicon Agnostic
    Block Diagram -- Ethernet 1G/2.5G/5G/10G/25G and CPRI 7.0 PCS
  • CPRI
    • Designed to CPRI Specification v7.0
    • Suitable for use in both Radio Equipment, Controllers (RECs) and Radio Equipment (RE), including multi-hop systems
    • 7-Series, UltraScale and UltraScale Plus supported line rates in the Table 1 below
    • Automatic speed negotiation
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