EEPROM IP

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Compare 146 EEPROM IP from 5 vendors (1 - 10)
  • 1Kbyte EEPROM IP with configuration 64p8w16bit
    • The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1Kbyte (16(bit per word) x 8(words per page) x 64(pages)) with single-bit output data and parallel write data in one word.
    • Write EEPROM page data comes to input di<15:0> and write process execute if signal wr=“1”.
    Block Diagram -- 1Kbyte EEPROM IP with configuration 64p8w16bit
  • 1024-bit EEPROM IP with configuration 32p2w16bit
    • The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1024 bits (16(bit per word) x 2(word per page) x 32(page)), which is organized as 32 pages of 2 words by 16 bit with single-bit output data and parallel write data.
    • Data writing in EEPROM consists of 2 phases - erasing and writing.
    Block Diagram -- 1024-bit EEPROM IP with configuration 32p2w16bit
  • 512-bit EEPROM IP with configuration 16p2w16bit
    • The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 512 bits (16(bit per word) x 2(word per page) x 16(page)), which is organized as 16 pages of 2 words by 16 bit with single-bit output data and parallel write data.
    • Write EEPROM page data comes to input D0<15:0> and write by words to latch through the signal SAMPLE, while the signal write in a state of «1». The address of a word written down in latches is defined by two low bits of the bus adr_bl<1:0>.
    Block Diagram -- 512-bit EEPROM IP with configuration 16p2w16bit
  • 1Kbyte Embedded EEPROM with configuration 64p8w16bit
    • SMIC EEPROM CMOS 0.18 um
    • 1Kbyte of available memory 16(bit per word) x 8(words per page) x 64(pages) bit
    Block Diagram -- 1Kbyte Embedded EEPROM with configuration 64p8w16bit
  • SPI/EEPROM Verification IP
    • Follows EEPROM basic specification as defined in Atmel AT25128A,AT25256A
    • EEPROM and Saifun SA25C020 EEPROM
    • Supports SPI Modes 0 (0,0) and 3 (1,1)
    • Supports 64-byte Page Mode and Byte Write Operation
    Block Diagram -- SPI/EEPROM Verification IP
  • 512bit EEPROM IP with configuration 16p2w16bit
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    Block Diagram -- 512bit EEPROM IP with configuration 16p2w16bit
  • 1Kbyte EEPROM with configuration 64p8w16bit
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    • Programming and erase time – 2 ms (determined by specification of the EEPROM SMIC cell)
    Block Diagram -- 1Kbyte EEPROM with configuration 64p8w16bit
  • 512-bit EEPROM with configuration 16p1w32bit
    • SMIC EEPROM CMOS 0.18 um
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    Block Diagram -- 512-bit EEPROM with configuration 16p1w32bit
  • 1KByte EEPROM IP with configuration 66p16w8bit
    • Global Foundries Embedded EEPROM 0.13 um
    • 1056 Byte of available memory 8(bit per word) x 16(words per page) x 66(pages) bit
    • High density of memory cells
    • Writing and erasing data by one high-voltage pulse
    Block Diagram -- 1KByte EEPROM IP with configuration 66p16w8bit
  • 2048bits EEPROM with configuration 16p8w16bit
    • GlobalFoundries Embedded EEPROM 0.13 um
    • 2048bit of available memory 16(bit per word) × 8(words per page) × 16(pages) bit
    Block Diagram -- 2048bits EEPROM with configuration 16p8w16bit
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