1Kbyte Embedded EEPROM with configuration 64p8w16bit

Overview

The block is a nonvolatile electrically erasable programmable read-only memory (EEPROM) with volume 1 Kbyte (16(bit per word) x 8(words per page) x 64(pages)) with single-bit output data and parallel write data in one word.
Write EEPROM page data comes to input di<15:0> and write process execute if signal wr=“1”.
Data di<15:0>, page address adr_p <5:0>, word address in page adr_w <2:0> are latched into internal registers and cannot be changed until the end of the writing process. At the end of the writing, the ready = “1” flag is set.
Data reading is carried out by specifying the page address adr_p <5:0> and the address of the word in the page adr_w <2:0>, as well as the reading bit in the word adr_b <3:0>. After applying the reading strobe, the do signal is set at the output corresponding to the reading data from the corresponding addresses of the EEPROM cell.
Memory is optimized for usage in the industrial and commercial applications, requiring low power consumption and supply voltage

Key Features

  • SMIC EEPROM CMOS 0.18 um
  • 1Kbyte of available memory 16(bit per word) x 8(words per page) x 64(pages) bit
  • High density of memory cells
  • Writing and erasing data by one high-voltage pulse
  • Programming and erase time – 2 ms (determined by specification of the EEPROM SMIC cell)
  • Page writes allowed
  • Data retention over 10 years (endurance 105 cycles, determined by SMIC technology)
  • Low power dissipation in standby and active mode

Applications

  • Access control systems
  • Radio-frequency identification systems, smart cards
  • Electronic devices with battery power
  • Chip serial ID and chip safety
  • Electronic tags UHF band

Deliverables

  • Schematic
  • GDSII
  • Abstract view (.lef and .lib files)
  • DRC, LVS, antenna reports
  • Datasheet

Technical Specifications

Foundry, Node
SMIC EEPROM CMOS 180 nm
Maturity
pre-silicon verification
Availability
Now
SMIC
Pre-Silicon: 180nm EEPROM
×
Semiconductor IP