Analog IP for TSMC
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94
Analog IP
for TSMC
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- 7nm
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Crystal Oscillators
- The crystal oscillator macros are available in a wide range of industry-standard quartz crystals and MEMS resonators operating in the fundamental mode in the 32 kHz to 80 MHz range.
- These oscillators, which are both power and area efficient, have a programmable transconductance to allow users to find the optimal balance between jitter and power consumption.
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Free running oscillators
- Compact and low power
- No external components
- Baseline CMOS logic process masks only
- Excellent frequency precision over PVT after trimming
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Xtal Oscillator on TSMC CLN7FF
- Crystal Oscillator pad macro that supports industry standard crystals
- Uses standard CMOS transistors
- Crystal Oscillation Mode: Fundamental
- Power down option for IDDQ testing
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Power On Reset on TSMC CLN7FF
- Integrated voltage and time references for precision stand-alone operation
- Easy to integrate with no additional component or special power requirements
- Easy to use and configure
- Programmable hysteresis, with independent programming available for power-on and power-off levels,
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Core Powered FracN/SSCG PLL on TSMC CLN7FF
- Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Very fine precision: near 1 part per billion resolution
- Fully integrated 32-bit datapath (8-bit integer plus 24-bit fractional)
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Temperature Sensor (Digital Output)
- Measurement Range: -20°C to +100°C
- Uncalibrated Accuracy: ±6°C
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Sleep Management Subsystem
- Power-On-Reset
- Programmable relaxation oscillator
- Low Power Comparator
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Power Management Subsystem
- The agilePMU Subsystem is an efficient and highly integrated Power Management Unit for SoCs/ASICs.
- Featuring a Power-On-Reset (POR), multiple Low Drop-Out (LDO) regulators, and an associated reference generator.
- The agilePMU Subsystem is designed to ensure low power consumption while providing optimal power management capabilities.
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Sensor Interface Subsystem
- The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs.
- Featuring multiple Analog-to-Digital Converters (agileADC), Digital-to-Analog Converters (agileDAC), low-power programmable analog comparators (agileCMP_LP), and an associated reference generator (agileREF).
- The agileSensorIF Subsystem enables easy interaction with the analog world.
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4.8GHz low jitter fractional-N, Digital PLL, TSMC N7, 0.75V, N/S orientation
- Pure core voltage design
- Compact IP size (< 0.013mm²) and low power consumption (1.1mW @ 3GHz)
- Compatible with commonly used crystal oscillator frequencies
- Good power noise immunity for period jitter (< ±15%/V)
