Analog IP for TSMC

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Compare 91 Analog IP for TSMC from 13 vendors (1 - 10)
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  • 7nm
  • 12-bit 400MSPS ADC on TSMC 7nm
    • The ODT-ADS-12B2400M-7T is an ultra low power ADC designed for use in a 6/7nm CMOS process.
    • This 12-bit, 400MSPS ADC supports input signals up to 200MHz and features a differential full-scale range of 1.0Vpp and excellent static and dynamic performance.
    Block Diagram -- 12-bit 400MSPS ADC on TSMC 7nm
  • Low Dropout (LDO) Capless Regulator on TSMC 7nm FFC
    • The ODT-LDO-IC-60M-7T-112 is a low dropout (LDO), linear regulator for integration in a SoC.
    • The LDO uses advanced control techniques to achieve excellent transient response, excellent PSRR performance and low noise.
    • The LDO has an integrated pass transistor and is stable with an on-chip capacitor of up to 250pF
    Block Diagram -- Low Dropout (LDO) Capless Regulator on TSMC 7nm FFC
  • Ultra‐Low‐Power Process/Voltage/Temperature Monitor on TSMC 7nm FFC
    • The ODT-PVT-ULP-001C-7T is an ultra-low power temperature, voltage and process monitor designed in a 7nm CMOS process.
    • This IP operates over the entire temperature range of -40°C to 150°C.
    • The temperature monitor achieves ±4C temperature accuracy without trim and ±1C temperature accuracy after a single room temperature trim.
    Block Diagram -- Ultra‐Low‐Power   Process/Voltage/Temperature Monitor on TSMC 7nm FFC
  • 12 bit 250MSPS ADC on TSMC 7nm
    • The ODT-ADS-12B250M-7T is an ultra-low power ADC designed in a 7nm CMOS process.
    • This 12-bit, 250MSPS ADC supports input signals up to 100MHz and features a differential full-scale range of 0.8Vpp and excellent static and dynamic performance.
    Block Diagram -- 12 bit 250MSPS ADC on TSMC 7nm
  • 12-bit 9GSPS ADC on 16nm
    • The ODT-ADS-12B9G-16 is an ultra-highperformance time-interleaved ADC designed in a 16nm CMOS process.
    • This 12-bit, 9GSPS ADC supports input signals up to 3.0 GHz and features a differential fullscale range of 0.8Vpp and excellent static and dynamic performance.
    Block Diagram -- 12-bit 9GSPS ADC	on 16nm
  • Ultra-Low-Power Process/Voltage/Temperature Monitor on 7nm
    • The ODT-PVT-INT-001C-7 is an ultra-low power Temperature, Voltage and Process Monitor designed in a 7nm CMOS process.
    • This IP operates over the entire temperature range of -40°C to 125°C.
    • The Temperature Monitor (TM) achieves ±4°C temperature accuracy without trim and ±1°C temperature accuracy after a single room temperature trim.
    Block Diagram -- Ultra-Low-Power Process/Voltage/Temperature Monitor on 7nm
  • PVT Sensor Subsystem
    • Start-up time: Typ 20us 
    • Current consumption: Max 25uA 
    • Industry standard digital interface 
    • Fully integrated macro 
    • Standard AMBA APB interface
    Block Diagram -- PVT Sensor Subsystem
  • All Digital Fractional-N RF Frequency Synthesizer PLL in TSMC N6/N7
    • Fractional Multiplication with frequencies up to 8GHz
    • Extremely low jitter (sub 300fs RMS)
    • Small size  (< 0.05 sq mm)
    • Low Power (< 7mW)
    Block Diagram -- All Digital Fractional-N RF Frequency Synthesizer PLL in TSMC N6/N7
  • All Digital Fractional-N PLL for Performance Computing in TSMC N6/N7
    • Fractional multiplication with frequency up to 4GHz
    • Low jitter (< 10ps RMS)
    • Small size  (< 0.01 sq mm)
    • Low Power (< 5mW)
    • Support for multi-PLL systems
    Block Diagram -- All Digital Fractional-N PLL for Performance Computing in TSMC N6/N7
  • Low Power All Digital Fractional-N PLL in TSMC N6/N7
    • Low power, suitable for IoT applications
    • Good jitter, suitable for clocking digital logic.
    • Extremely small die area (< 0.005 sq mm), using a ring oscillator
    • Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
    Block Diagram -- Low Power All Digital Fractional-N PLL in TSMC N6/N7
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