Verifying Processor Security, Part 2
This is the second post about Eli Singerman's keynote at the recent Jasper User Group. The first was Formally Verifying Processor Security. In the last couple of years, high-performance processors (not just Intel's) have been shown to be vulnerable to various side-channel attacks. These typically rely on using speculative execution to run code that should not be run, and then, despite the speculative execution being abandoned, some leak of data occurs. The first two such attacks were announced to the public at the start of last year with the names Spectre and Meltdown.
Eli is working on using formal approaches to prove that a future processor is immune to side-channel attacks, and also for analyzing the effects of mitigation on current processors (going back seven years). This is not just hardware that needs to be analyzed, but core firmware (in the processor itself) and other firmware (in devices like cameras and accelerators).
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related Blogs
- Formally Verifying Processor Security
- Upcoming IoT Security Legislation: Vulnerability Disclosure - Part 2
- ST-Ericsson (Part 2): Diverse Offering
- Intel vs. ARM: In the Smartphone Era (Part 2)
Latest Blogs
- Cadence Extends Support for Automotive Solutions on Arm Zena Compute Subsystems
- The Role of GPU in AI: Tech Impact & Imagination Technologies
- Time-of-Flight Decoding with Tensilica Vision DSPs - AI's Role in ToF Decoding
- Synopsys Expands Collaboration with Arm to Accelerate the Automotive Industry’s Transformation to Software-Defined Vehicles
- Deep Robotics and Arm Power the Future of Autonomous Mobility