Formally Verifying Processor Security
November 20, 2019
Intel has had a couple of major events that totally changed their attitude to verification. The first was in 1994 when they had the Pentium floating-point divide bug and management said “don’t ever let this happen again”. In 1996, they started proving properties of the Pentium processor FPU.
Then, a couple of years ago, the side-channel vulnerabilities like Spectre were discovered. These didn't just affect Intel, it turned out every modern CPU had the same problem hiding in plain view for 20 years. Basically, the vulnerability plays on speculative execution making memory references and then being able to discover which memory elements were accessed, even though the speculative execution got abandoned.
To read the full article, click here
Related Semiconductor IP
- JESD204E Controller IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
Related Blogs
- Verifying Processor Security, Part 2
- Formally verifying protocols
- Formally verifying AVX2 rejection sampling for ML-KEM
- what made Apple design the A4 processor?
Latest Blogs
- A Low-Leakage Digital Foundation for SkyWater 90nm SoCs: Introducing Certus’ Standard Cell Library
- FPGAs vs. eFPGAs: Understanding the Key Differences
- UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
- RT-Europa: The Foundation for RISC-V Automotive Real-Time Computing
- Arm Flexible Access broadens its scope to help more companies build silicon faster