RISC-V is Inevitable
In just a few short years, RISC-V has become a category of utmost importance in tech; but, things are just getting started.
In 2014, the inventors of RISC-V (and founders of SiFive) published a very “modest” goal: for RISC-V to become the standard ISA for all computing devices. Ambitious at the time, but now we can confidently state that RISC-V has made its impact in our industry and is here to stay. RISC-V has become hugely important – strategic to companies and governments alike – and has already made its way into billions of chips and thousands of companies.
And… we’re just getting started.
This week, you may have noticed SiFive unveiled a new look on our website and a clear focus on high performance as we continue to drive RISC-V forward and define the future of compute. RISC-V is inevitable, and we are accelerating that timeline.
To our internal teams, this energy, aggressiveness, and decisive roadmap is nothing new. We’ve been building successful products for years, and now we’re growing faster than ever. Our resolve has never been stronger: to build the best-in-class processor IP that will be at the heart of future computing platforms — from artificial intelligence, machine learning, automotive,data center, mobile, to consumer markets. As we rapidly accelerate our performance capabilities, RISC-V truly will have no limits.
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