Formally verifying protocols
I attended much of the Jasper users' group a week ago. There were several interesting presentations that I can't just blog about because companies are shy, and some that would only be of interest if you were a user of Jasper's products on a daily basis.
But for me the most interesting presentations were several on an area that I didn't realize this sort of formal verification was being used for. The big driver is that modern multi-core processors now require much more sophisticated cache control than before. ARM in particular has created some quite sophisticated protocols under the AMBA4 umbrella that they announced at DAC.
To read the full article, click here
Related Semiconductor IP
- Xtal Oscillator on TSMC CLN7FF
- Wide Range Programmable Integer PLL on UMC L65LL
- Wide Range Programmable Integer PLL on UMC L130EHS
- Wide Range Programmable Integer PLL on TSMC CLN90G-GT-LP
- Wide Range Programmable Integer PLL on TSMC CLN80GC
Related Blogs
- Addressing Heterogenous Verification and Validation Requirements for Compute Express Link (CXL) Designs Using Synopsys Protocol Continuum
- Synopsys Protocol Verification Solution for UCIe 1.0
- Standing the Test of Time: How Advanced Protocol Verification Creates Bulletproof SoC Designs
- How to Speed Up Simulation Coverage Closure with Formal Verification Tools