How Is the Semiconductor Industry Handling Scaling: Is Moore's Law Still Alive?
October 13, 2022
The chip design industry is going through exciting times. Process nodes with smaller geometries have always enticed chip manufacturers and OEMs, as it helps integrate more functionality over SoC. This reduction in the process nodes has been predicted by Moore's law and achieved through scaling rules as per Dennard's law.
Moore's law held for decades, but with the effective upper bound of clock frequencies, quantum tunneling and interconnects limitations, etc., it is on the deathbed. In addition, as shown in the figure, maximum clock frequency has decreased, and even single-thread performance improvements have slowed considerably.
To read the full article, click here
Related Semiconductor IP
- xSPI Multiple Bus Memory Controller
- MIPI CSI-2 IP
- PCIe Gen 7 Verification IP
- WIFI 2.4G/5G Low Power Wakeup Radio IP
- Radar IP
Related Blogs
- How Physical AI Is Redefining the Automotive Industry
- Is IP SoC 2018 Still Alive? Better than Ever!
- Moore's Law is not Dead
- How Imagination is steering the automotive industry to a safer future
Latest Blogs
- The Growing Importance of PVT Monitoring for Silicon Lifecycle Management
- Unlock early software development for custom RISC-V designs with faster simulation
- HBM4 Boosts Memory Performance for AI Training
- Using AI to Accelerate Chip Design: Dynamic, Adaptive Flows
- Locking When Emulating Xtensa LX Multi-Core on a Xilinx FPGA