How CXL Is Improving Latency in High-Performance Computing
From the dawn of civilization through 2003, roughly five exabytes of data were created in total, according Eric Schmidt, past CEO of Google. By 2025, global data creation is expected to reach 180 zettabytes. This means that within the span of a single generation, we've created roughly 36,000 times the amount of data ever created—that's a lot of data! To accommodate this data explosion, the installed base of storage capacity is expected to increase at 19.2% CAGR through 2025, and the data center accelerator market is expected to grow by 25% CAGR through 2028.
It doesn't stop there.
Managing data—created, copied, stored, consumed, and otherwise proliferated from the data center to the edge—creates unique challenges for SoC designers. This includes mounting pressure to move the data through systems faster and with greater efficiency and security: Lower power. Smaller area. Lower latency. And with data confidentiality and integrity. It's essential for the interconnects in multi-die systems to have low latency along with enough flexibility to manage a variety of bandwidths and throughput. Complying with the right industry standards can help ensure design success.
To read the full article, click here
Related Semiconductor IP
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
- ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
- High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm
- Verification IP for DisplayPort/eDP
- Wirebond Digital and Analog Library in TSMC 65nm
Related Blogs
- How the CXL Standard Improves Latency in High-Performance Computing
- How to Get High-Performance Simulation with Predictable Capacity Uplift in the Cloud
- How Arm is making it easier to build platforms that support Confidential Computing
- Utilizing CXL 2.0 IP in the Defense Sector: A Revolution in Secure Computing
Latest Blogs
- Half of the Compute Shipped to Top Hyperscalers in 2025 will be Arm-based
- Industry's First Verification IP for Display Port Automotive Extensions (DP AE)
- IMG DXT GPU: A Game-Changer for Gaming Smartphones
- Rivos and Canonical partner to deliver scalable RISC-V solutions in Data Centers and enable an enterprise-grade Ubuntu experience across Rivos platforms
- ReRAM-Powered Edge AI: A Game-Changer for Energy Efficiency, Cost, and Security