AI Hardware Summit Event Recap: Interview with Steven Woo
The fifth annual AI Hardware Summit was back this month, and for the first time in a couple of years, it took place fully in-person in Santa Clara, California. The world’s leading experts in AI hardware came together over the course of three days to discuss some of the big challenges facing the industry, and amongst them was Rambus Fellow, Steven Woo.
We caught up with Steven to find out all about the event and learn more about the panel discussion he led on one of the primary challenges for AI hardware and systems, the AI memory bottleneck.
To read the full article, click here
Related Semiconductor IP
- Network-on-Chip (NoC)
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- DVB-S2 Demodulator
- UCIe PHY (Die-to-Die) IP
- UCIe-S 64GT/s PHY IP
Related Blogs
- Focus on Memory at AI Hardware Summit
- From vision to reality in RISC-V: Interview with Karel Masarik
- Unleashing Gaming and AI Innovation Across Consumer Device Markets with New Arm GPUs
- Alphawave Semi Elevates AI with Cutting-Edge HBM4 Technology
Latest Blogs
- Enabling End-to-End EDA Flow on Arm-Based Compute for Infrastructure Flexibility
- Real PPA improvements from analog IC migration
- Design specification: The cornerstone of an ASIC collaboration
- The importance of ADCs in low-power electrocardiography ASICs
- VESA Adaptive-Sync V2 Operation in DisplayPort VIP