Accelerating the Future of RISC-V
The freedom of RISC-V enables a bright future for SiFive
What a time to be in the Semiconductors and CPU industry! As an industry, we are experiencing a perfect storm. With the rise of machine learning, cloud computing, and autonomous driving; the need for advancement in computing has never been greater. This is happening at a time when Moore’s law has considerably slowed and dennard scaling has come to an end. Architectural innovation is required to break out of the current logjam, but the closed nature of proprietary ISAs that have dominated our industry for three decades are unwieldy and unsuitable for application-specific computing needs going forward.
To read the full article, click here
Related Semiconductor IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- Compact Embedded RISC-V Processor
- Multi-core capable 64-bit RISC-V CPU with vector extensions
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
Related Blogs
- DAC 2024 - Showcasing the future of RISC-V through EDA
- FiRa 3.0 Use Cases: Expanding the Future of UWB Technology
- From DIY To Advanced NoC Solutions: The Future Of MCU Design
- Ethernet Evolution: Trends, Challenges, and the Future of Interoperability
Latest Blogs
- Enabling End-to-End EDA Flow on Arm-Based Compute for Infrastructure Flexibility
- Real PPA improvements from analog IC migration
- Design specification: The cornerstone of an ASIC collaboration
- The importance of ADCs in low-power electrocardiography ASICs
- VESA Adaptive-Sync V2 Operation in DisplayPort VIP