A Confident ASIC Design Path through Co-Creation
The first blog in this series talked about the competitive benefits to differentiating OEM products in hardware as well as software, followed by a high-level view of our co-creation programs. In this blog I would like to talk a bit more about the way we at CEVA and Intrinsix approach collaboration with OEM and semiconductor, for a confident path to turnkey ASIC design or to wireless subsystem design. To illustrate, imagine the kind of SoC you might want to build for a wireless smart speaker or smart home entertainment system. Core to this system is an audio pipeline supporting voice processing for control commands and wireless connectivity through Wi-Fi and Bluetooth connectivity, where the BT connection could be for remote control or audio streaming. We also include on-chip RF for Bluetooth and WiFi. An overall block diagram is shown below.
To read the full article, click here
Related Semiconductor IP
- USB 20Gbps Device Controller
- AGILEX 7 R-Tile Gen5 NVMe Host IP
- 100G PAM4 Serdes PHY - 14nm
- Bluetooth Low Energy Subsystem IP
- Multi-core capable 64-bit RISC-V CPU with vector extensions
Related Blogs
- Why thinking about software and security is so important right at the start of an ASIC design
- Charting a Productive New Course for AI in Chip Design
- AI Is Driving a New Frontier in Chip Design
- What are AI Chips? A Comprehensive Guide to AI Chip Design
Latest Blogs
- From guesswork to guidance: Mastering processor co-design with Codasip Exploration Framework
- Enabling AI Innovation at The Far Edge
- Unleashing Leading On-Device AI Performance and Efficiency with New Arm C1 CPU Cluster
- The Perfect Solution for Local AI
- UA Link vs Interlaken: What you need to know about the right protocol for AI and HPC interconnect fabrics