Cryptography IP

Compare 334 Cryptography IP from 58 vendors (1 - 10)

SHA-3 Crypto IP Core
- FIPS 202 compliant
- Supports cryptographic hashing for SHA-3 in 224/256/384/512 mode
- Extendable-Output Functions for SHAKE 128/256
- AMBA® AXI4-Stream
Advanced DPA- and FIA-resistant FortiCrypt AES SW library
- Ultra-strong side-channel and SIFA protection at high performance
- NIST FIPS-197 compliant
- AES-128/192/256 encryption and decryption
- Tunable protection level
Public Key Accelerator
- Modular exponentiation operations with up to 4096-bit modulus
- Prime field ECC operations with up to 571-bit modulus
- Fastest implementation is 58 kGE and 68 Op/s for 2048-bit RSA, 431 Op/s for 1024-bit RSA, 150 Op/s for 384-bit scalar multiplication
- Smallest implementation is 33 kGE and 67 Op/s for 1024-bit RSA, 24 Op/s for 384-bit scalar multiplication
DPA- and FIA-Resistant Balanced FortiCrypt AES IP Core
- A wide range of configurations to match the user’s cost/performance target
- Low latency
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
- Optional embedded internal PRNG for random masking
DPA and FIA-Resistant Ultra-Compact FortiCrypt AES IP core
- Ultra-compact
- Ultra-efficient in terms of performance per gate
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
DPA- and FIA-resistant Ultra Low Power FortiCrypt AES IP core
- Ultra-low power in terms of performance per watt
- Passes the rigorous Test Vector Leakage Assessment (TVLA) methodology at 1B traces
- Protected against fault injection attacks, including SIFA
- Tunable protection level
- Optional embedded internal PRNG for random masking
DPA- and FIA-resistant Ultra High Bandwidth FortiCrypt AES IP core
- Ultra-high bandwidth due to multi-pipeline architecture, HUNDREDs Gbps (@500 MHz on a 45nm tech. process)
- GCM authentication tag protection (patent pending)
- Ultra-strong side-channel attack protection (at least 1B traces)
- Protected against fault injection attacks including SIFA
CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
- Hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard.
HMAC-SHA256 cryptographic accelerator
- Hardware Root of Trust
- Widely used password hash algorithm
- Security Critical HTTP, SSL, TLS
- Key storage in Private memory
AES Engine IP
- The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-197.
- It supports AES-ECB AES-XTS mode and 128/256 key-length both encryption/decryption.
- The core engine supports 128/256/512 data width operation.