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I3C
- Innosilicon’s I3C (Improved Inter Integrated Circuit) is enhanced with I2C protocol and is compatible with I2C
- It adds new functions, including higher transmission speed, in-band interrupt, CRC check, and so on
- Now, the I3C protocol is divided into MIPI and JEDEC
- Usually, MIPI I3C is applied in sensor/IoT data transmission, and JEDEC I3C is applied in storage chip configuration
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Ultra-low-power 60 GHz radar-on-chip
- CSEM has developed a low-cost, ultra-low-power 60 GHz MIMO FMCW PHY that can be integrated into radar-on-chips with custom digital processing for specific applications.
- This solution leverages CSEM’s decades of experience in ultra-low-power RF CMOS system-on-chip design.
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cjTAG IEEE 1149.7 Compact TAP Controller
- Supports IEEE 1149.7 classes 0–5 (selected through hardware configuration parameter)
- Partitioned along IEEE 1149.7-specified functional boundaries (so that only the required hardware is included):
- Supports all mandatory and optional scan formats: JScan0–3, SScan0–3, OScan0–7, and MScan
- Supports all mandatory and optional cJTAG commands
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LZ4/Snappy Data Decompressor
- LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithms.
- The core receives compressed files, automatically detects the LZ4 or Snappy format, and outputs the decompressed data.
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xHCI Verification IP
- Compliant with xHCI 1.1, USB3.1, USB3.0, USB2.0 (including errata) and PIPE specifications 3.0, UTMI+ 1.1, ULPI 1.1 specifications.
- Full support for backward compatibility (HS/FS/LS).
- Flexible user interface : AHB/AXI/PCIe with configurable Data width (32,64,128).
- Supports upto 64 device slots, 2 downstream ports and upto 4 interrupters.
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SD Card Verification IP
- Compatible with all the versions V1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 6.10, 7.00
- Supports all Capacity of Memory i.e.
- Standard Capacity SD Memory Card (SDSC)
- High Capacity SD Memory Card (SDHC)
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SD Card Verification IP
- Compatible with all the versions V1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 6.10, 7.00
- Supports all Capacity of Memory i.e.
- Standard Capacity SD Memory Card (SDSC)
- High Capacity SD Memory Card (SDHC)
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WDT Verification IP
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog.
- Unique development methodology to ensure highest levels of quality.
- Availability of Conformance and Regression Test Suites.
- 24X5 customer support.
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PWM Verification IP
- Data registers of either 8,16,24 or 32-bit width.
- One global counter bus and four local counter buses are driven by Unified channels.
- Each channel has its own timebase, alternative to the counter buses.
- One global prescaler and one prescaler per channel.
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PIT Verification IP
- The programmable interval timer module (PIT) contains clock select logic, up counter, a modulo register, and a control register.
- Support With Different Counting Mode i.e count up and count down.
- Support Interrupt generation.
- Support multiple clock sources, including selectable clock prescalers.
