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Compare 73 Analog Basics IP from 20 vendors (1 - 10)
  • Voltage Latched Comparator
    • A high-speed voltage clocked comparator with rail- to-rail outputs and no hysteresis.
    • The typical propagation delay is 19ns while applying a differential input signal of 1mV over the offset voltage.
    • The comparator operates with a supply voltage of 3.3V typical (VCC).
    Block Diagram -- Voltage Latched Comparator
  • 13ns High-Speed Comparator with no Hysteresis
    • The TS_CMP_13ns_X8 is a high-speed comparator with no hysteresis and a propagation delay of 13ns while having a differential input signal of 25mV.
    • The comparator consumes current of 350μA.
    • The circuit features an Enable signal turning on/off the comparator.
    Block Diagram -- 13ns High-Speed Comparator with no Hysteresis
  • 39GHz High-Efficiency CMOS Power Amplifier for 5G mmWave Applications
    • 2-stage PAEmax = 45%
    • PA-stage DEmax = 54%
    • Psat = 18.3dBm
    • Gain = 19dB
    • Efficiency maintained at lower supply voltages for added reliability
    Block Diagram -- 39GHz High-Efficiency CMOS Power Amplifier for 5G mmWave Applications
  • 28GHz High-Efficiency CMOS Power Amplifier for 5G mmWave Applications
    • 2-stage PAEmax = 52.3%
    • PA-stage DEmax = 61.5%
    • Psat = 19.02dBm
    Block Diagram -- 28GHz High-Efficiency CMOS Power Amplifier for 5G mmWave Applications
  • Very-low-noise and programmable very-high-gain DC-voltage amplifier with precision offset trimming
    • The TS_VA_LNDC_X8 comprises the main function dcamp and its companion dcamptrim.
    • The dcamp is a very-low-output-noise-level (604µVRMS max) and 1%-precise programmable very-high-gain (32 selectable gains up to 400V/V) DC-voltage amplifier, with an extra differential input for precision offset trimming by the dual 8-bit one’s-complement-coded DAC dcamptrim.
    Block Diagram -- Very-low-noise and programmable very-high-gain DC-voltage amplifier with precision offset trimming
  • Revolutionaly Ultra Low Phase Noise RF Amplifier-LNA IP
    • Revolutionary Ultra Low Phase Noise operation
    • Ultra Low Power Operation
    • RF front end sensitivity enhancement
    Block Diagram -- Revolutionaly Ultra Low Phase Noise RF Amplifier-LNA IP
  • 130 to 940 MHz Power amplifier
    • iHP SGB25V
    • E class PA
    • Adjusted gain (-20..10 dBmW)
    • Build-in voltage regulator
    Block Diagram -- 130 to 940 MHz Power amplifier
  • Programmable-Threshold Comparator
    • The agileCMP GP Programmable Threshold Comparator features a user-selectable (enable/disable) hysteresis as well as programmable threshold with 10mV step size, a latched output, as well as an active (unlatched) output.
    • With a focus on long battery life, the agileCMP GP can be used to monitor external analog signals and enable wake-up events as is essential in many modern SoCs.
    • The agileCMP GP Programmable Threshold Comparator is ideally suited for interrupt generation in applications such as in IoT, Security, Automotive, AI and general SoCs and ASICs.
    Block Diagram -- Programmable-Threshold Comparator
  • Low Power Comparator
    • The agileCMP_LP is a comparator suitable for use in any low power system. It is designed to provide a flexible range of comparison voltages suitable for many sensor interface designs.
    • The agileCMP_LP consists of a voltage reference generator and comparator set at different threshold levels for multi-level detection and the output is not latched.
    Block Diagram -- Low Power Comparator
  • 3 to 5 GHz power amplifier
    • iHP SiGe BiCMOS 0.13 um
    • E class PA
    • Frequency range 3…5 GHz
    • Built-in voltage regulator
    Block Diagram -- 3 to 5 GHz power amplifier
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