智原推出联电14纳米MIPI C/D Combo PHY IP 助力智能感测创新
为满足市场对智能感测应用日益增长的需求,智原进一步扩展其在联电14纳米 FinFET平台的MIPI C/D Combo PHY IP产品组合。这次新推出的IP同时支持MIPI C-PHY v2.0,速度达到每trio 3.0 Gsps,以及D-PHY v2.5,每通道达4.5 Gbps,并提供可弹性扩充的配置,以满足多元的带宽需求。
Read story →Semiconductor IP Intelligence
Follow new IP cores, vendor updates, expert perspectives and technical trends across SoC, ASIC and chiplet design — with direct paths from industry news to real semiconductor IP in the marketplace.
Featured
为满足市场对智能感测应用日益增长的需求,智原进一步扩展其在联电14纳米 FinFET平台的MIPI C/D Combo PHY IP产品组合。这次新推出的IP同时支持MIPI C-PHY v2.0,速度达到每trio 3.0 Gsps,以及D-PHY v2.5,每通道达4.5 Gbps,并提供可弹性扩充的配置,以满足多元的带宽需求。
Read story →Latest updates
Expert perspectives
Read perspectives from IP providers, EDA experts and semiconductor specialists on design automation, IP integration, verification, architectures and emerging technologies.
Expert insight
By Mohith Haridoss
Expert insight
By Richard York
Expert insight
By Mohith Haridoss
Marketplace
Find IP cores related to the technologies covered in Pulse. Semi IP Hub helps engineers discover semiconductor IP without turning users into sales leads by default.
Serial Signal Interface, Multi-Lane support - Passive Monitors
Technical articles
By Fraunhofer IPMS
By Chris Morrison, Agile Analog
By Insaf Meliane, Arteris
From news to IP discovery
Explore IP cores, providers and categories across interface, security, compute, memory, analog, mixed-signal and chiplet-ready technologies.
Semi IP Hub Pulse brings together semiconductor IP industry news, expert perspectives, technical articles, blogs and videos for engineers, SoC architects, ASIC design teams and semiconductor decision-makers.
It helps users follow new IP cores, ecosystem partnerships, research papers, silicon design trends, security IP, interface IP, RISC-V, AI acceleration, chiplets, photonics, memory technologies and other topics shaping the semiconductor IP market.