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Search (58)
Compare 58 IP stack IP from 19 vendors (1 - 10)
  • UDP/IP Offload Engine - 10G/25G/40G/100Gbit/s Ethernet UDP/IP
    • AXI4s MAC & Application Interfaces
    • De-fragmentation option available
    • Designed to UDP specification RFC768
    • Compose/Decompose complete UDP Datagrams
    Block Diagram -- UDP/IP Offload Engine - 10G/25G/40G/100Gbit/s Ethernet UDP/IP
  • TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP
    • 1 to 256 Simultaneous connections
    • Server/Client roles, configurable per connection
    • Automatically establish & tear-down connections
    • All-RTL send/receive for extremely low latency
    Block Diagram -- TCP/IP Offload Engine - 10G/ 25G/40G/100Gbit/s TCP/IP
  • Ultra Low Latency 10G TCP Endpoint
    • The TCP Endpoint implements a full, reliable streaming network stack in FPGA logic.
    • It allows applications in logic to be directly connected to Internet Protocol (IP) interfaces by opening, maintaining, and closing TCP Connections via Ethernet to other hardware or software endpoints.
    Block Diagram -- Ultra Low Latency 10G TCP Endpoint
  • CAN-SEC Bus Controller IP
    • The CAN-SEC Acceleration Engine Core implements the CAN-XL Protocol (CiA 610-1), CAN-XL Addon Part 1-Simple/Extercontent Indication (CiA 613-1), and CAN-XL Addon Part 2-Security (CiA 613- 2) Protocols.
    • The CAN-SEC Acceleration Engine core is easy to integrate with the Host processor using AMBA-APB, AHB_Lite or AMBA-AXI standard interface.
    Block Diagram -- CAN-SEC Bus Controller IP
  • ULL TCP/IP, UDP/IP Offload Engine
    • High-performance TCP and UDP IP offload engine cores offer a reliable, ultra-low-latency solution for financial and network applications.
    • They address the data center industry’s growing need for throughput and hardware acceleration and provide network protocol offload for applications such as financial data processing, reprogrammable Smart NICs, and high-performance computing.
    Block Diagram -- ULL TCP/IP, UDP/IP Offload Engine
  • 100G UDP Offload Engine - Offloads UDP packet processing for efficient, high-speed networking
    • The 100G UDP Offload Engine in Verification IP (VIP) offloads UDP packet processing to specialized hardware, enhancing data transmission efficiency. It ensures low latency and high throughput with support for checksum offloading, segmentation, and reassembly.
    • This solution is ideal for high-speed networks, including data centers, telecoms, and multimedia streaming. It supports both IPv4 and IPv6 protocols, delivering optimized performance for real-time applications, from gaming to AI/ML data transmission.
    Block Diagram -- 100G UDP Offload Engine - Offloads UDP packet processing for efficient, high-speed networking
  • 100G TCP/IP Offload Engine - Validates high-speed network traffic, optimizing flow and reliability
    • The 100G TCP/IP Offload Engine is a cutting-edge Verification IP designed to streamline the testing of high-speed networking interfaces. It supports high-performance, real-world simulations of network traffic, flow control, and buffer management for seamless data integrity at 100G rates.
    • With its extensive debugging and protocol compliance features, the Offload Engine aids in reducing validation time while ensuring system reliability. It integrates easily with modern verification frameworks, optimizing performance across diverse network topologies
    Block Diagram -- 100G TCP/IP Offload Engine - Validates high-speed network traffic, optimizing flow and reliability
  • CPU-less QUIC Offload IP core for FPGA Acceleration
    • TCP/IP off-loading engine for 10/25GBASE-R
    • Support IPv4 protocol
    • Support one port connection
    Block Diagram -- CPU-less QUIC Offload IP core for FPGA Acceleration
  • UDP 100G / 40G / 25G / 10G / 1G IP core
    • UDP100G/40G/25G/10G/1G IP core is the epochal solution implemented without CPU.
    • This IP core is suitable for network application.
    • This IP product includes reference design for AMD FPGA. It helps you to reduce development time.
    Block Diagram -- UDP 100G / 40G / 25G / 10G / 1G IP core
  • 200G / 100G / 40G / 25G / 10G / 1G TCP Offloading Engine
    • The TCP Offloading Engine IP core (TOE200G/100G/40G/25G/10G/1G-IP) is the epochal solution implemented without CPU.
    • Generally, TCP processing is so complicated that expensive high-end CPU is required.
    • TOE-IP core series built by pure hardwired logic can take place of such extra CPU for TCP protocol management.
    Block Diagram -- 200G / 100G / 40G / 25G / 10G / 1G TCP Offloading Engine
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