IP Catalog > Multimedia IP

Multimedia IP

Multimedia IP cores are IP blocks used in the design of multimedia processing systems. These IP cores are typically developed to perform specific functions related to handling multimedia data, such as audio, video, graphics, and imaging. Multimedia IP cores can handle a variety of tasks, including:

  • Video Encoding/Decoding (Codec): IP cores that can compress or decompress video streams (e.g., H.264, HEVC, VP9).
  • Audio Encoding/Decoding: IP cores used to compress or decompress audio data (e.g., MP3, AAC).
  • Image Processing: IP cores for tasks like scaling, filtering, or converting images (e.g., resizing, color space conversion).
  • Graphics Processing: IP cores for rendering graphics, handling 2D or 3D graphics rendering, and processing graphic objects in video games, GUIs, or other visual applications.
  • Video Streaming: IP cores that manage real-time streaming of video data for playback or transmission.
  • Signal Processing: IP cores that process signals from sensors, cameras, microphones, etc., typically to filter, enhance, or interpret the data.
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Search (593)
Compare 593 Multimedia IP from 83 vendors (1 - 10)
  • Lossless & Lossy Frame Compression IP
    • The CFrame60 is a Lossless & Lossy Frame Compression Hardware IP, Designed to significantly reduce memory size, DRAM bandwidth and power.
    • This ultra-small, highly flexible IP consists of a set of compression IP and decompression IP, with the ability to easily switch between lossless and lossy.
    Block Diagram -- Lossless & Lossy Frame Compression IP
  • AC97 Audio Controller
    • Fixed 48kHz audio support
    • Hardware variable sample rate support from 8kHz to 48kHz (up to 96kHz with Double Rate Audio enabled)
    • Double Rate Audio support for Left, Right and Center channels
    • 16 bit sample size support (18 and 20 bit support planned in future)
    Block Diagram -- AC97 Audio Controller
  • MPEG-1/2 + AAC Audio Decoder
    • The MPEG-1/2+AAC Audio Decoder (CWda99) is an audio IP core for decoding up to 6 audio channels in real-time.
    • This core contains the MPEG + AAC decoder software and the Coreworks processor based hardware audio engine platform (CWda3111).
    Block Diagram -- MPEG-1/2 + AAC Audio Decoder
  • AAC-LC Audio Decoder
    • The AAC-LC Audio Decoder (CWda87) is an audio IP core for decoding up to 6 audio channels in real-time.
    • This core contains the AAC-LC decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- AAC-LC Audio Decoder
  • AAC-LC Audio Encoder
    • The AAC-LC Audio Encoder (CWda86) is an audio IP core for encoding up to 6 audio channels in real-time.
    • This core contains the AAC-LC encoder software and the Coreworks processor based hardware audio engine platform (CWda3011).
    Block Diagram -- AAC-LC Audio Encoder
  • AAC-LC Stereo Audio Encoder
    • The AAC-LC Stereo Audio Encoder (CWda84) is an audio IP core for encoding one stereo stream in real-time.
    • This core contains the AAC-LC stereo encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- AAC-LC Stereo Audio Encoder
  • MPEG-1/2 – Layer I/II Audio Decoder
    • The MPEG-1/2 – Layer I/II Audio Decoder (CWda75) is an audio IP core for decoding one audio stream in real-time(1).
    • This core contains the MPEG-1/2 – Layer I/II decoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- MPEG-1/2 – Layer I/II Audio Decoder
  • MPEG-1/2 - Layer I/II Audio Encoder
    • The MPEG-1/2 – Layer I/II Audio Encoder (CWda74) is an audio IP core for encoding one audio stream in real-time.
    • This core contains the MPEG-1/2 – Layer I/II encoder software and the Coreworks processor based hardware audio engine platform (CWda1011).
    Block Diagram -- MPEG-1/2 - Layer I/II Audio Encoder
  • Digital Video Anti-aliasing filter IP Core
    • The ALIAS_FILTER IP Core is a fully pipelined anti-aliasing filter for use in digital video applications.
    • The design implements a low pass filter response on the source video in order to alleviate problems such as jagged edges, stepped lines and Moiré interference patterns.
    • This is especially important when downscaling and upscaling video by large factors.
    Block Diagram -- Digital Video Anti-aliasing filter IP Core
  • Camera Link Interface
    • The Camera Link® IP Core is a high-speed LVDS transmitter / receiver pair that conforms to the standard Camera Link protocol originally developed by National Semiconductor Corp®.
    • The design is comprised of an independent transmitter and receiver that may be implemented separately or together as a single transceiver unit. The IP Core may be used in either the BASE, MEDIUM or FULL configurations as defined in the Camera Link specification.
    Block Diagram -- Camera Link Interface
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