IP Catalog > Analog IP

Analog IP

Analog IP generally handles every feature on a chip that connects to the outside world, plus power management and clocking.

Analog IP cores in this category include PLLs that generate various clocks, A/D converter IP and D/A converter IP that convert analog and digital signals, sensor IPs that measure temperature and voltage, and analog functional parts for configuring analog front ends (AFEs).

Explore our vast directory of Analog IP cores below.

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Search (5,714)
Compare 5,714 Analog IP from 114 vendors (1 - 10)
  • ULP Clock Generator - GLOBALFOUNDRIES 22FDX
    • The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
    • High energy efficiency: Only 5 μW are consumed during operation
    • A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
    Block Diagram -- ULP Clock Generator - GLOBALFOUNDRIES 22FDX
  • Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
    • Tightly integrated power management platform with a soft-IP wrapper around Analog / Mixed-Signal hard macros which generate all supply voltages and clock signals needed to run highly efficient SoCs in GlobalFoundries® 22FDX®.
    • Running from only one supply voltage and reference clock, the IP generates its own internal supplies and references, and those needed to run the Racyics® ABX® Generator.
    Block Diagram -- Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
  • ADPLL 2GHz Clock Generator - GLOBALFOUNDRIES 22FDX
    • Clock generation based on a Digitally Controlled Oscillator (DCO)
    • 800 MHz < = DCO frequency < = 2400 MHz
    • Programmable clock frequency dividers for ADPLL loop and clock outputs
    • lock-in < 25 us
    Block Diagram -- ADPLL 2GHz Clock Generator - GLOBALFOUNDRIES 22FDX
  • ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
    • The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
    • High energy efficiency: Only 5 μW are consumed during operation
    • A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
    Block Diagram -- ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
  • Automotive Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
    • RI_ABB_GF22FDX_AM is an adaptive body bias voltage generator for automotive applications in Globalfoundries 22FDX® technology.
    • It contains a closed loop body bias regulation loop to generate N-well and P-well bias voltages for compensation of process, voltage and temperature (PVT) variations during operation.
    • This results in up to 76% leakage power improvement for automotive grade-1 applications up to 150°C junction temperature.
    Block Diagram -- Automotive Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
  • Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX
    • RI_ABB_GF22FDX is a cutting-edge adaptive body bias (ABB) generator for GLOBALFOUNDRIES® 22FDX® technology.
    • Featuring patented closed control loops with independent N-well and P-well body bias voltage generation, this silicon-proven IP dynamically compensates for process, voltage, and temperature (PVT) variations during operation.
    Block Diagram -- Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX
  • 14b 560kS/s pipeline ADC
    • Effective Number of Bits: 13.5b (SNDR=83dB signal-to-noise-and-distortion-ratio)
    • Power supply 3.3V, Power Consumption 2,4mW
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 4pF
    Block Diagram -- 14b 560kS/s pipeline ADC
  • 12b 1MS/s serial ADC
    • Effective Number of Bits: 11b (SNDR=68dB signal-to-noise-and-distortion-ratio)
    • Power supply 3.3V
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 7pF
    Block Diagram -- 12b 1MS/s serial ADC
  • 15b 4kS/s serial ADC
    • Effective Number of Bits: 15b (SNDR=92dB signal-to-noise-and-distortion-ratio) with digital IIR filter post-processing
    • Power supply 3.3V, Power Consumption 200µW
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 4pF
    Block Diagram -- 15b 4kS/s serial ADC
  • 14b 30kS/s serial ADC
    • Effective Number of Bits: 13.5b (SNDR=83dB signal-to-noise-and-distortion-ratio)
    • Power supply 3.3V, Power Consumption 170µW
    • 0.35um CMOS Technology
    • Low input sampling capacitor of 4pF
    Block Diagram -- 14b 30kS/s serial ADC
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