Security IP
Security IP cores are critical components designed to protect embedded systems from cyber threats by providing encryption, authentication, and secure communication. These cores enhance the security of devices by integrating advanced features like Crypto Accelerator IP, which accelerates cryptographic algorithms, and DPA and FIA Countermeasures IP, which safeguard against side-channel attacks. Inline Memory Encryption IP ensures that sensitive data stored in memory is encrypted in real-time, while Quantum Safe Cryptography IP prepares devices for future-proof security against quantum computing threats. Root of Trust IP establishes a secure foundation for boot processes, and Security Protocol Engine IP manages secure communication protocols for reliable, encrypted data transfer.
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Secure Hash Algorithm 512 IP Core
- FIPS PUB 180-4 compliant SHA2-512 function
- RFC 2104 compliant HMAC mode native support
- SHA2 224, 256, 384, 512-bit modes support
- Secure storage for precomputed HMAC keys
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Secure Hash Algorithm 384 IP Core
- FIPS PUB 180-4 compliant SHA2-384 function
- RFC 2104 compliant HMAC mode native support
- SHA2 224, 256, 384-bit modes support
- Secure storage for precomputed HMAC keys
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Secure Hash Algorithm 256 IP Core
- FIPS PUB 180-4 compliant SHA2-256 function
- RFC 2104 compliant HMAC mode native support
- SHA2 224 and 256 bit modes support
- Secure storage for precomputed HMAC keys
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Centralised Real Time Processor IP Core
- CryptOne programmed algorithms:
- Constant time modular exponentiation
- Constant time, parallel modular exponentiation CRT
- Constant time ECDSA sign/verify
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NIST P-256/P-384 ECDH+ECDSA - Compact ECC IP Cores supporting ECDH and ECDSA on NIST P-256/P-384
- Minimal Resource Requirements
- Secure Architecture
- FIPS 186-4 and SP 800-56A compliant
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800G/400G/200G/100G AES Encryption Core
- The 800G/400G/200G/100G AES Encryption Core is a high performance—yet low footprint—AES engine for 800/400/200/100 Gbps applications.
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100G AES Encryption Core
- The 100G AES Encryption Core is a high performance—yet low footprint—AES engine for 100 Gbps applications.
- Typical applications are providing bulk encryption for 100GE, LO ODUCn and OTU4.
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50G/40G/25G/10G AES Encryption Core
- The 10G/25G/40G/50G AES Encryption Core is a high performance—yet low footprint—AES engine for 10 Gbps to 50 Gbps applications.
- Typical applications include providing bulk encryption for 25GE, 10GE, OTU3, OTU2 and OTU2e as well as legacy SONET/SDH OC192/STM-64 environments.
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Sub-2.5G AES Encryption Core
- The sub-2.5G AES Encryption Core is a special low footprint and low-power implementation of AES engine for application requiring less than 2.5G/s.
- Because of its tiny footprint and low power, it works exceptionally well in system utilizing Gigabit Ethernet, fiber channel, custom linkage using RSlink/ethernet, GFP, dedicated VPN links, OTU1 and SONET/SDH OC48/12/3 and STM-16/4/1 environment.
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1-port Receiver/Transmitter HDCP 2.3 on DisplayPort 1.4/2.0 ESM (generation 3)
- The HDCP 2.3 Embedded Security Modules (ESMs) on DisplayPort are autonomous modules that provide designers with a complete and robust transmitter (TX) or receiver (RX) implementation of the HDCP 2.3 content-protection technology over DisplayPort wired connections, including USB Type-C/USB 3.1.
- This solution helps designers shorten development cycles and fully meet the stringent compliance and robustness requirements of the DCP LLC licensing authority.
