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Security IP

Security IP cores are critical components designed to protect embedded systems from cyber threats by providing encryption, authentication, and secure communication. These cores enhance the security of devices by integrating advanced features like Crypto Accelerator IP, which accelerates cryptographic algorithms, and DPA and FIA Countermeasures IP, which safeguard against side-channel attacks. Inline Memory Encryption IP ensures that sensitive data stored in memory is encrypted in real-time, while Quantum Safe Cryptography IP prepares devices for future-proof security against quantum computing threats. Root of Trust IP establishes a secure foundation for boot processes, and Security Protocol Engine IP manages secure communication protocols for reliable, encrypted data transfer.

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Search (530)
Compare 530 Security IP from 81 vendors (1 - 10)
  • CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
    • Hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard.
    Block Diagram -- CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
  • HMAC-SHA256 cryptographic accelerator
    • Hardware Root of Trust
    • Widely used password hash algorithm
    • Security Critical HTTP, SSL, TLS
    • Key storage in Private memory
    Block Diagram -- HMAC-SHA256 cryptographic accelerator
  • Silicon Security Solution
    • Secure Root of Trust
    • Protect against cyber hacks, copying, cloning, trojans
    • Flexible management and Upgrade path for features
    • Reduced complexity with software keys
    Block Diagram -- Silicon Security Solution
  • AES Engine IP
    • The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-197.
    • It supports AES-ECB AES-XTS mode and 128/256 key-length both encryption/decryption.
    • The core engine supports 128/256/512 data width operation.
    Block Diagram -- AES Engine IP
  • Ethernet Switch/Router Datacenter ToR 32x100G
    •  32 x 100 Gigabit Ethernet ports.
    •  Full wire-speed on all ports and all Ethernet frame sizes.
    •  Store and forward shared memory architecture.
    •  Support for jumbo packets up to 32738 bytes.
    Block Diagram -- Ethernet Switch/Router Datacenter ToR 32x100G
  • Ethernet Switch/Router IPSec/MACSec 9x10G + 2x40G
    • 9 ports of 10 Gigabit Ethernet.
    •  2 ports of 40 Gigabit Ethernet.
    •  Full wire-speed on all ports and all Ethernet frame sizes.
    •  Store and forward shared memory architecture.
    •  Support for jumbo packets up to 32733 bytes.
    Block Diagram -- Ethernet Switch/Router IPSec/MACSec 9x10G + 2x40G
  • PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
    • eSi-Crystals is a hardware core for accelerating the high-level operations specified in the NIST FIPS 202, FIPS 203 and FIPS 204 standards.
    • It supports the Cryptographic Suite for Algebraic Lattices (CRYSTALS), it is lattice-based digital signature algorithm designed to withstand attacks from quantum computers, placing it in the category of post-quantum cryptography (PQC). 
    Block Diagram -- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
  • HDCP Verification IP
    • Supports HDCP 1.4, HDCP 2.2 and HDCP 2.3 end to end protection.
    • Can handle HDCP encryption and decryption for 8 bit and 32 bit link symbol.
    • Capable of continuous link integrity check for all lanes and rates.
    • Supports aux transactions for authentication protocol.
    Block Diagram -- HDCP Verification IP
  • ECC7 Elliptic Curve Processor for Prime NIST Curves
    • Elliptic Curve Cryptography (ECC) is a public-key cryptographic technology that uses the mathematics of so called “elliptic curves” and it is a part of the “Suite B” of cryptographic algorithms approved by the NSA.
    • The design is fully synchronous, with the exception of the seed part, and available in both source and netlist form.
    • The core is supplied as portable Verilog (VHDL version available) thus allowing customers to carry out an internal code review to ensure its security.
    Block Diagram -- ECC7 Elliptic Curve Processor for Prime NIST Curves
  • 1G/2.5G/5G/10G/25G/50G MACsec
    • The MACsec IP provides Ethernet Layer 2 Security for port authentication, data confidentiality and data integrity as standardized in IEEE 802.1AE.
    • It protects components in Ethernet networks especially high-speed Ethernet used in automotive, industrial, cloud, data center, and wireless infrastructure.
    • The MACsec IP is a fully compliant solution that provides line-rate encryption and supports VLAN-in-Clear.
    Block Diagram -- 1G/2.5G/5G/10G/25G/50G MACsec
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