Ultralink IP
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Ultralink IP cores enable a proprietary die-to-die solution for multi-die system in package integration over streaming, CXS, and AXI protocols.
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Ultralink Controller
- 1Tbps/mm unidirectional bandwidth
- Low power and low latency
- Easy routing and straightforward integration
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40G UltraLink D2D PHY
- Innovative mixed-signal architecture to achieve high bandwidth, ultra low latency and low power
- Flexible data rate from 20Gbps to 40Gbps
- Built-in self-test features to ensure “known good die”
- Interoperable between different technology nodes and foundries
- Easy routing and straightforward integration
- Achieves better than 10-15 bit error rate (BER) without requiring forward error correction (FEC)
- Integrated scrambling and lane de-skew functionality
- Supports -40ºC to 125ºC industrial temperature range
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Chiplet Interconnect - Die-to-die interconnect IP solutions for advanced and standard packaging applications
- High data rate of 2–24 Gb/s
- Very low power of < 0.375 pJ/bit @ 2–16 Gb/s 0.5-V VDDQ
- Very low latency of < 2 ns PHY-to-PHY
- Support for 2:1, 4:1, 8:1, 12:1 and 16:1 serialization and deserialization ratios