IP Catalog > Multimedia IP > Video Codec IP

Video Codec IP

Video codec IP cores encode and decode digital video signals in real-time. These cores are designed to offload the computationally intensive tasks of video compression and decompression from a general-purpose processor. By supporting various video standards such as H.264, HEVC, VP9, and AV1, video codec IP cores enable efficient video streaming, storage, and playback. They offer high performance, low power consumption, and flexibility, ensuring high-quality video experiences across a wide range of applications.

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Search (149)
Compare 149 Video Codec IP from 49 vendors (1 - 10)
  • AC97 Audio Controller
    • Fixed 48kHz audio support
    • Hardware variable sample rate support from 8kHz to 48kHz (up to 96kHz with Double Rate Audio enabled)
    • Double Rate Audio support for Left, Right and Center channels
    • 16 bit sample size support (18 and 20 bit support planned in future)
    Block Diagram -- AC97 Audio Controller
  • Bayer to RGB Converter
    • BAYER_TO_RGB is a fully pipelined Bayer-mapped to RGB converter IP Core.
    • The IP Core may be used to process the raw pixels from an image sensor or Colour Filter Array (CFA).
    • These pixels are typically organized as a bayer pattern of discrete Red, Green and Blue values which must be interpolated to recover the original image - a process that is commonly known as de-mosaicing.
    Block Diagram -- Bayer to RGB Converter
  • BT656 Test Pattern Generator
    • Test patterns as industry standard ITU-R BT.656
    • Supports PAL (576i) and NTSC (480i) formats
    • Choice of various test pattern outputs
    • All signals synchronous with pixel clock
    Block Diagram -- BT656 Test Pattern Generator
  • BT656 Encoder with Colour-Space Converter
    • BT_656_ENCODER is a digital video encoder with integrated colour-space converter. The encoder accepts 24-bit RGB pixels from sequential odd and even fields.
    • These pixels are then mapped to the YCbCr colour-space and formatted correctly into a BT.656 output stream.
    Block Diagram -- BT656 Encoder with Colour-Space Converter
  • Multi-format Video Deinterlacer
    • The DEINTERLACER IP Core is a high quality 24-bit RGB video deinterlacer capable of generating progressive output video at up to 4096x4096 pixels in resolution.
    • The design is fully customizable, supporting any desired interlaced video format.
    Block Diagram -- Multi-format Video Deinterlacer
  • Video Test Pattern Generator
    • Pixels and syncs are generated on a rising clock-edge when pixout_val is high and pixout_rdy is high.
    • The signal pixout_vsync is active high when the first pixel of a frame is output.
    • The signal pixout_hsync is active high when the first pixel of a line is output.
    • The pixout_field flag indicates either an odd or even field when interlaced mode is enabled.
    Block Diagram -- Video Test Pattern Generator
  • Video Timing Generator
    • The VID_TIMING_GEN IP Core is a fully configurable video timing generator with the ability to support any video resolution up to 216 x 216 pixels in size.
    • The module is compatible with a wide range of video DACs, encoders and transmitters and provides a flexible solution for displaying digital or analogue video on an external TV, monitor or flat panel display.
    • The module is capable of clock speeds in excess of 400 MHz on some FPGA platforms, making it ideal for the latest generation HD and UHD video solutions.
    Block Diagram -- Video Timing Generator
  • Digital Video Scaler
    • 24-bit RGB video in/out
    • Independent vertical and horizontal scaling
    • Resolutions from 16x16 to 4095x4095 pixels
    Block Diagram -- Digital Video Scaler
  • 3-D Audio Processing Core
    • The J5 is a core cell design of an application specific signal processor which performs both Trusurround(TM) and SRS® 3-D audio virtualization processing in a single design.
    • The 3-D processing allows users to enjoy benefits of a multi-channel sound source with only two reporduction channels. 
    Block Diagram -- 3-D Audio Processing Core
  • Dolby Digital/AC-3/MPEG Audio Decoding Core
    • The J1 is a core cell design of an application specific signal processor which performs both Dolby Digital/AC-3 and MPEG audio decompression in a single design.
    • The J1 is capable of decoding all AC-3 bitstreams with full support for bitstreams encoded with 5.1 channels and data rates of up to 640kb/s.
    • The J1 downmixing capability produces stereo output in either normal or Pro-Logic compatible modes, making it ideal for DVD and set-top applications.
    Block Diagram -- Dolby Digital/AC-3/MPEG Audio Decoding Core
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